# source:docs/HPCA2011/05-corei3.tex@1302

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1\section{Baseline Evaluation on \CITHREE{}}
2
3%some of the numbers are roughly calculated, needs to be recalculated for final version
4\subsection{Cache behavior}
5\CITHREE\ has a three level cache hierarchy.  The approximate miss penalty for each cache
6level is 4, 11, and 36 cycles respectively.  Figure
7\ref{corei3_L1DM}, Figure \ref{corei3_L2DM} and Figure
8\ref{corei3_L3TM} show the L1, L2 and L3 data cache misses for each of the parsers.  Although XML parsing is non memory intensive
9application, cache misses for the Expat and Xerces parsers represent a 0.5 cycle per XML byte cost whereas the performance of the Parabix parsers remains essentially
10unaffected by data cache misses.  Cache misses not only consume additional CPU cycles but increase application energy consumption.  L1, L2, and L3 cache misses consume
11approximately 8.3nJ, 19nJ, and 40nJ respectively. As such, given a 1GB XML file as input, Expat and Xerces would consume over 0.6J and 0.9J respectively due to cache misses alone.
12%With a 1GB input file, Expat would consume more than 0.6J and Xercesn
13%would consume 0.9J on cache misses alone.
14
15
16\begin{figure}
17\begin{center}
18\includegraphics[width=0.5\textwidth]{plots/corei3_L1DM.pdf}
19\end{center}
20\caption{\CITHREE\ --- L1 Data Cache Misses (y-axis: Cache Misses per kB)}
21\label{corei3_L1DM}
22\end{figure}
23
24\begin{figure}
25\begin{center}
26\includegraphics[width=0.5\textwidth]{plots/corei3_L2DM.pdf}
27\end{center}
28\caption{\CITHREE\ --- L2 Data Cache Misses (y-axis: Cache Misses per kB)}
29\label{corei3_L2DM}
30\end{figure}
31
32\begin{figure}
33\begin{center}
34\includegraphics[width=0.5\textwidth]{plots/corei3_L3CM.pdf}
35\end{center}
36\caption{\CITHREE\ --- L3 Cache Misses (y-axis: Cache Misses per kB)}
37\label{corei3_L3TM}
38\end{figure}
39
40\subsection{Branch Mispredictions}
41Despite improvements in branch prediction, branch misprediction penalties contribute
42significantly to XML parsing performance. On modern commodity processors the cost of a single branch
43misprediction is commonly cited as over 10 CPU cycles.  As shown in
44Figure \ref{corei3_BM}, the cost of branch mispredictions for the Expat parser
45can be over 7 cycles per XML byte---this cost alone is equal to the average total cost for Parabix2 to process each byte of XML.
46
47In general, reducing the branch misprediction rate is difficult in text-based XML parsing
48applications. This is due in part to the variable length nature of the syntactic elements contained within XML documents, a data dependent characterstic,
49as well as the extensive set of syntax constraints imposed by the XML 1.0 specification. As such, traditional byte-at-a-time XML parsers generate a performance limiting
50number of branch mispredictions.  As shown in Figure \ref{corei3_BR}, Xerces averages up to 13
51branches per XML byte processed on high density markup.
52
53The performance improvement of Parabix1 in terms of branch mispredictions results from the veritable elimination of conditional branch instructions in scanning. Leveraging the processor built-in {\em bit scan}
54operation together with parallel bit stream technology Parabix1 can scan up to 64 bytes of source XML with a single {\em bit scan} instruction. In comparison, a byte-at-a-time parser must
55process a conditional branch instruction per XML byte scanned.
56
57As shown in Figure \ref{corei3_BR}, Parabix2 processing is almost branch free. Utilizing a new parallel scanning technique based on bit stream addition, Parabix2 exhibits minimal dependence on source XML markup density. Figure \ref{corei3_BR} displays this lack of data dependence via the constant number of branch
58mispredictions shown for each of the source XML files.
59% Parabix1 minimize the branches by using parallel bit
60% streams.  Parabix1 still have a few branches for each block of 128
61% bytes (SSE) due to the sequential scanning.  But with the new parallel
62% scanning technique, Parabix2 is essentially branch-free as shown in
63% the Figure \ref{corei3_BR}.  As a result, Parabix2 has minimal
64% dependency on the markup density of the workloads.
65
66\begin{figure}
67\begin{center}
68\includegraphics[width=0.5\textwidth]{plots/corei3_BR.pdf}
69\end{center}
70\caption{\CITHREE\ --- Branch Instructions (y-axis: Branches per kB)}
71\label{corei3_BR}
72\end{figure}
73
74\begin{figure}
75\begin{center}
76\includegraphics[width=0.5\textwidth]{plots/corei3_BM.pdf}
77\end{center}
78\caption{\CITHREE\ --- Branch Mispredictions (y-axis: Branch Mispredictions per kB)}
79\label{corei3_BM}
80\end{figure}
81
82\subsection{SIMD Instructions vs. Total Instructions}
83
84Parabix achieves performance via parallel bit stream technology. In Parabix XML processing, parallel bit streams are
85both computed and predominately operated upon using the SIMD instructions of commodity processors.  The ratio of
86retired SIMD instructions to total instructions provides insight into\ the relative degree to which Parabix achieves parallelism
87over the byte-at-a-time approach.
88
89Using the Intel Pin tool, we gather the dynamic instruction mix for each XML workload, and classify instructions as either vector (SIMD) or non-vector instructions.
90Figures \ref{corei3_INS_p1} and \ref{corei3_INS_p2} show the
91percentage of SIMD instructions for Parabix1 and Parabix2 respectively.
92%(Expat and Xerce do not use any SIMD instructions)
93For Parabix1, 18\% to 40\% of the executed instructions are SIMD instructions.  Using
94bit stream addition to scan XML characters in parallel, the Parabix2 instruction mix is made up of 60\% to 80\%
95SIMD instructions.  Although the resulting ratios are (negatively) proportional to the markup density
96for both Parabix1 and Parabix2, the degradation rate of
97Parabix2 is much lower and thus the performance penalty incurred by
98increasing the markup density is reduced.
99%Expat and Xerce do not use any SIMD instructions and were not included in this portion of the study.
100
101% Parabix gains its performance by using parallel bitstreams, which are
102% mostly generated and calculated by SIMD instructions.  The ratio of
103% executed SIMD instructions over total instructions indicates the
104% amount of parallel processing we were able to achieve.  We use Intel
105% pin, a dynamic binary instrumentation tool, to gather instruction mix.
106% Then we adds up all the vector instructions that have been executed.
107% Figure \ref{corei3_INS_p1} and Figure \ref{corei3_INS_p2} show the
108% percentage of SIMD instructions of Parabix1 and Parabix2 (Expat and
109% Xerce do not use any SIMD instructions).  For Parabix1, 18\% to 40\%
110% of the executed instructions consists of SIMD instructions.  By using
111% bistream addition for parallel scanning, Parabix2 uses 60\% to 80\%
112% SIMD instructions.  Although the ratio decrease as the markup density
113% increase for both Parabix1 and Parabix2, the decreasing rate of
114% Parabix2 is much lower and thus the performance degradation caused by
115% increasing markup density is smaller.
116
117
118\begin{figure}
119\begin{center}
120\includegraphics[width=0.5\textwidth]{plots/corei3_INS_p1.pdf}
121\end{center}
122\caption{Parabix1 --- SIMD vs. Non-SIMD Instructions (y-axis: Percent SIMD Instructions}
123\label{corei3_INS_p1}
124\end{figure}
125
126\begin{figure}
127\begin{center}
128\includegraphics[width=0.5\textwidth]{plots/corei3_INS_p2.pdf}
129\end{center}
130\caption{Parabix2 --- SIMD vs. Non-SIMD Instructions (y-axis: Percent SIMD Instructions)}
131\label{corei3_INS_p2}
132\end{figure}
133
134\subsection{CPU Cycles}
135
136Figure \ref{corei3_TOT} shows overall parser performance
137evaluated in terms of CPU cycles per kilobyte.  Parabix1 is 1.5 to
1382.5 times faster on document-oriented input and 2 to 3 times faster on
139data-oriented input than the Expat and Xerces parsers respectively.  Parabix2 is 2.5
140to 4 times faster on document-oriented input and 4.5 to 7 times faster
141on data-oriented input.  Traditional parsers can be dramatically
142slowed by dense markup, while Parabix2 is generally unaffected.  The results presented are not entirely fair to the
143Xerces parser since it first transcodes input from UTF-8 to UTF-16 before processing. In Xerces, this transcoding requires
144several cycles per byte.  However, transcoding using parallel
145bit streams is significantly faster and requires less than a single cycle per byte.
146\cite{Cameron2008}.
147
148\begin{figure}
149\begin{center}
150\includegraphics[width=0.5\textwidth]{plots/corei3_TOT.pdf}
151\end{center}
152\caption{\CITHREE\ --- Performance (y-axis: CPU Cycles per kB)}
153\label{corei3_TOT}
154\end{figure}
155
156\subsection{Power and Energy}
157In response to the growing industry concerns on power consumption and energy efficiency,
158chip producers work hard to not only improve performance but
159also achieve high energy efficiency in processors design. We study the
160power and energy consumption of Parabix in comparison with Expat and
161Xerces on \CITHREE{}. The average power of \CITHREE\ 530 is about 21 watts.
162This Intel model has a good reputation for power efficiency. Figure \ref{corei3_power} shows the average power consumed by each parser.
163Parabix2, dominated by SIMD instructions, uses approximately 5\% additional power.
164
165\begin{figure}
166\begin{center}
167\includegraphics[width=0.5\textwidth]{plots/corei3_power.pdf}
168\end{center}
169\caption{\CITHREE\ --- Average Power Consumption (watts)}
170\label{corei3_power}
171\end{figure}
172
173As shown in Figure \ref{corei3_energy}, a comparison of energy efficiency demonstrates a more interesting result. Although
174Parabix2 requires slightly more power (per instruction), the processing time of Parabix2 is significantly lower,
175and therefore Parabix2 consumes substantially less energy than the other parsers. Parabix2 consumes 50 to 75
176nJ per byte while Expat and Xerces consume 80nJ to 320nJ and 140nJ to 370nJ per byte respectively.
177
178\begin{figure}
179\begin{center}
180\includegraphics[width=0.5\textwidth]{plots/corei3_energy.pdf}
181\end{center}
182\caption{\CITHREE\ --- Energy Consumption ($\mu$J per kB)}
183\label{corei3_energy}
184\end{figure}
185
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