source: docs/HPCA2012/10-conclusions.tex @ 1328

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1\section{Conclusion}
2This paper has examined energy efficiency and performance
3characteristics of four XML parsers considered over three
4generations of Intel processor architecture and shown that
5parsers based on parallel bit stream technology have dramatically
6better performance, energy efficiency and scalability than
7traditional byte-at-a-time parsers widely deployed in current
8software.  Based on a novel application of the short vector
9SIMD technology commonly found in commodity processors of
10all kinds, parallel bit stream technology scales well with
11improvements in processor SIMD capabilities.  With the recent
12introduction of the first generation of Intel processors that
13incorporate AVX technology, the change to 3-operand
14form SIMD operations has delivered a substantial benefit
15for the Parabix2 parsers simply through recompilation.
16Restructuring of Parabix2 to take advantage of the 256-bit SIMD
17capabilities also delivered a substantial reduction in
18instruction count, but without corresponding performance
19benefits in the first generation of AVX implementations.
20
21
22There are many directions for further research. These
23include compiler and tools technology to automate the low-level
24programming tasks inherent in building parallel bit stream
25applications, widening the research by applying the techniques
26to other forms of text analysis and parsing, and further
27investigation of the interaction between parallel bit
28stream technology and processor architecture.  Two promising
29avenues include investigation of GPGPU approaches to parallel
30bit stream technology and the leveraging of the intraregister parallelism
31inherent in this approach to also take advantage of the intrachip
32parallelism of multicore processors.
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