source: icGREP/icgrep-devel/icgrep/IR_Gen/idisa_target.cpp @ 5464

Last change on this file since 5464 was 5464, checked in by nmedfort, 2 years ago

Restructuring work for the Driver classes. Start of work to eliminate the memory leaks with the ExecutionEngine?. Replaced custom AlignedMalloc? with backend call to std::aligned_malloc. Salvaged some work on DistributionPass? for reevaluation.

File size: 1.6 KB
Line 
1/*
2 *  Copyright (c) 2016 International Characters.
3 *  This software is licensed to the public under the Open Software License 3.0.
4 */
5
6#include "idisa_target.h"
7#include <toolchain/toolchain.h>
8#include <IR_Gen/idisa_sse_builder.h>
9#include <IR_Gen/idisa_avx_builder.h>
10#include <IR_Gen/idisa_i64_builder.h>
11#include <IR_Gen/idisa_nvptx_builder.h>
12#include <llvm/IR/Module.h>
13#include <llvm/ADT/Triple.h>
14
15#include <kernels/kernel_builder.h>
16
17using namespace kernel;
18
19namespace IDISA {
20   
21KernelBuilder * GetIDISA_Builder(llvm::LLVMContext & C, const std::string & targetTriple) {
22    unsigned registerWidth = 0;
23    llvm::Triple T(targetTriple);
24    if (T.isArch64Bit()) {
25        registerWidth = 64;
26    } else if (T.isArch32Bit()) {
27        registerWidth = 32;
28    } else if (T.isArch16Bit()) {
29        registerWidth = 16;
30    }
31    const bool hasAVX2 = AVX2_available();
32    if (LLVM_LIKELY(codegen::BlockSize == 0)) {  // No BlockSize override: use processor SIMD width
33        codegen::BlockSize = hasAVX2 ? 256 : 128;
34    }
35    if (codegen::BlockSize >= 256) {
36        if (hasAVX2) {
37            return new KernelBuilderImpl<IDISA_AVX2_Builder>(C, registerWidth, codegen::BlockSize, codegen::BlockSize);
38        }
39    } else if (codegen::BlockSize == 64) {
40        return new KernelBuilderImpl<IDISA_I64_Builder>(C, registerWidth, codegen::BlockSize, codegen::BlockSize);
41    }
42    return new KernelBuilderImpl<IDISA_SSE2_Builder>(C, registerWidth, codegen::BlockSize, codegen::BlockSize);
43}
44
45KernelBuilder * GetIDISA_GPU_Builder(llvm::LLVMContext & C) {
46    return new KernelBuilderImpl<IDISA_NVPTX20_Builder>(C, 64, 64, 64*64);
47}
48
49}
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