source: icGREP/icgrep-devel/icgrep/IR_Gen/idisa_target.cpp @ 6053

Last change on this file since 6053 was 5975, checked in by cameron, 18 months ago

Use AVX512F as foundation class, adopting Cole's approach

File size: 3.0 KB
Line 
1/*
2 *  Copyright (c) 2016 International Characters.
3 *  This software is licensed to the public under the Open Software License 3.0.
4 */
5
6#include "idisa_target.h"
7#include <toolchain/toolchain.h>
8#include <IR_Gen/idisa_sse_builder.h>
9#include <IR_Gen/idisa_avx_builder.h>
10#include <IR_Gen/idisa_i64_builder.h>
11#include <IR_Gen/idisa_nvptx_builder.h>
12#include <llvm/IR/Module.h>
13#include <llvm/ADT/Triple.h>
14#include <llvm/Support/ErrorHandling.h>
15#include <llvm/Support/raw_ostream.h>
16#include <kernels/kernel_builder.h>
17
18using namespace kernel;
19using namespace llvm;
20
21struct Features {
22    bool hasAVX;
23    bool hasAVX2;
24    bool hasAVX512F;
25    Features() : hasAVX(0), hasAVX2(0), hasAVX512F(0) { }
26};
27
28Features getHostCPUFeatures() {
29    Features hostCPUFeatures;
30    StringMap<bool> features;
31    if (sys::getHostCPUFeatures(features)) {
32        hostCPUFeatures.hasAVX = features.lookup("avx");
33        hostCPUFeatures.hasAVX2 = features.lookup("avx2");
34        hostCPUFeatures.hasAVX512F = features.lookup("avx512f");
35    }
36    return hostCPUFeatures;
37}
38
39bool AVX2_available() {
40    StringMap<bool> features;
41    if (sys::getHostCPUFeatures(features)) {
42        return features.lookup("avx2");
43    }
44    return false;
45}
46
47bool AVX512BW_available() {
48    StringMap<bool> features;
49    if (sys::getHostCPUFeatures(features)) {
50        return features.lookup("avx512bw");
51    }
52    return false;
53}
54
55namespace IDISA {
56
57KernelBuilder * GetIDISA_Builder(llvm::LLVMContext & C) {
58    const auto hostCPUFeatures = getHostCPUFeatures();
59    if (LLVM_LIKELY(codegen::BlockSize == 0)) {  // No BlockSize override: use processor SIMD width
60
61        if (hostCPUFeatures.hasAVX512F) codegen::BlockSize = 512;
62        else if (hostCPUFeatures.hasAVX2) codegen::BlockSize = 256;
63        else codegen::BlockSize = 128;
64    }
65    else if (((codegen::BlockSize & (codegen::BlockSize - 1)) != 0) || (codegen::BlockSize < 64)) {
66        llvm::report_fatal_error("BlockSize must be a power of 2 and >=64");
67    }
68    if (codegen::BlockSize >= 512) {
69        // AVX512BW builder can only be used for BlockSize multiples of 512
70        if (hostCPUFeatures.hasAVX512F) {
71            return new KernelBuilderImpl<IDISA_AVX512F_Builder>(C, codegen::BlockSize, codegen::BlockSize);
72        }
73    }
74    if (codegen::BlockSize >= 256) {
75        // AVX2 or AVX builders can only be used for BlockSize multiples of 256
76        if (hostCPUFeatures.hasAVX2) {
77            return new KernelBuilderImpl<IDISA_AVX2_Builder>(C, codegen::BlockSize, codegen::BlockSize);
78        } else if (hostCPUFeatures.hasAVX) {
79            return new KernelBuilderImpl<IDISA_AVX_Builder>(C, codegen::BlockSize, codegen::BlockSize);
80        }
81    } else if (codegen::BlockSize == 64) {
82        return new KernelBuilderImpl<IDISA_I64_Builder>(C, codegen::BlockSize, codegen::BlockSize);
83    }
84    return new KernelBuilderImpl<IDISA_SSE2_Builder>(C, codegen::BlockSize, codegen::BlockSize);
85}
86#ifdef CUDA_ENABLED
87KernelBuilder * GetIDISA_GPU_Builder(llvm::LLVMContext & C) {
88    return new KernelBuilderImpl<IDISA_NVPTX20_Builder>(C, 64, 64 * 64);
89}
90#endif
91}
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