source: icGREP/icgrep-devel/icgrep/toolchain.cpp @ 5364

Last change on this file since 5364 was 5364, checked in by cameron, 2 years ago

Consolidate pipeline compiler options in toolchain

File size: 9.8 KB
Line 
1/*
2 *  Copyright (c) 2016 International Characters.
3 *  This software is licensed to the public under the Open Software License 3.0.
4 *  icgrep is a trademark of International Characters.
5 */
6
7#include "toolchain.h"
8#include <llvm/CodeGen/CommandFlags.h>             // for InitTargetOptionsF...
9#include <llvm/ExecutionEngine/ExecutionEngine.h>  // for EngineBuilder
10#include <llvm/Support/CommandLine.h>              // for OptionCategory
11#include <llvm/Support/TargetSelect.h>             // for InitializeNativeTa...
12#include <llvm/Support/raw_ostream.h>              // for errs, raw_ostream
13#include <llvm/ADT/SmallString.h>                  // for SmallString
14#include <llvm/IR/LegacyPassManager.h>             // for PassManager
15#include <llvm/IR/Verifier.h>
16#include <llvm/InitializePasses.h>                 // for initializeCodeGen
17#include <llvm/PassRegistry.h>                     // for PassRegistry
18#include <llvm/Support/CodeGen.h>                  // for Level, Level::None
19#include <llvm/Support/Compiler.h>                 // for LLVM_UNLIKELY
20#include <llvm/Target/TargetMachine.h>             // for TargetMachine, Tar...
21#include <llvm/Target/TargetOptions.h>             // for TargetOptions
22#include <llvm/Transforms/Scalar.h>
23#include <llvm/Transforms/Utils/Local.h>
24#include <object_cache.h>
25#include <kernels/pipeline.h>
26#ifdef CUDA_ENABLED
27#include <IR_Gen/llvm2ptx.h>
28#endif
29 
30using namespace llvm;
31
32namespace codegen {
33
34static cl::OptionCategory CodeGenOptions("Code Generation Options", "These options control code generation.");
35
36static cl::bits<DebugFlags>
37DebugOptions(cl::values(clEnumVal(ShowIR, "Print generated LLVM IR."),
38#if LLVM_VERSION_MINOR > 6
39                        clEnumVal(ShowASM, "Print assembly code."),
40#endif
41                        clEnumVal(SerializeThreads, "Force segment threads to run sequentially."),
42                        clEnumValEnd), cl::cat(CodeGenOptions));
43
44static cl::opt<std::string> IROutputFilename("dump-generated-IR-output", cl::init(""), cl::desc("output IR filename"), cl::cat(CodeGenOptions));
45#if LLVM_VERSION_MINOR > 6
46static cl::opt<std::string> ASMOutputFilename("asm-output", cl::init(""), cl::desc("output ASM filename"), cl::cat(CodeGenOptions));
47static cl::opt<bool> AsmVerbose("asm-verbose",
48                                cl::desc("Add comments to directives."),
49                                cl::init(true), cl::cat(CodeGenOptions));
50#endif
51
52char OptLevel;
53static cl::opt<char, true> OptLevelOption("O", cl::desc("Optimization level. [-O0, -O1, -O2, or -O3] (default = '-O1')"), cl::location(OptLevel),
54                              cl::cat(CodeGenOptions), cl::Prefix, cl::ZeroOrMore, cl::init('1'));
55
56
57static cl::opt<bool> EnableObjectCache("enable-object-cache", cl::init(false), cl::desc("Enable object caching"), cl::cat(CodeGenOptions));
58
59static cl::opt<std::string> ObjectCacheDir("object-cache-dir", cl::init(""), cl::desc("Path to the object cache diretory"), cl::cat(CodeGenOptions));
60
61
62int BlockSize;
63int SegmentSize;
64int BufferSegments;
65int ThreadNum;
66bool EnableAsserts;
67#ifndef NDEBUG
68#define DEFAULT_TO_TRUE_IN_DEBUG_MODE true
69#else
70#define DEFAULT_TO_TRUE_IN_DEBUG_MODE false
71#endif
72
73static cl::opt<int, true> BlockSizeOption("BlockSize", cl::location(BlockSize), cl::init(0), cl::desc("specify a block size (defaults to widest SIMD register width in bits)."), cl::cat(CodeGenOptions));
74static cl::opt<int, true> SegmentSizeOption("segment-size", cl::location(SegmentSize), cl::desc("Segment Size"), cl::value_desc("positive integer"), cl::init(1));
75static cl::opt<int, true> BufferSegmentsOption("buffer-segments", cl::location(BufferSegments), cl::desc("Buffer Segments"), cl::value_desc("positive integer"), cl::init(1));
76static cl::opt<int, true> ThreadNumOption("thread-num", cl::location(ThreadNum), cl::desc("Number of threads used for segment pipeline parallel"), cl::value_desc("positive integer"), cl::init(2));
77static cl::opt<bool, true> EnableAssertsOption("ea", cl::location(EnableAsserts), cl::desc("Enable Asserts"), cl::init(DEFAULT_TO_TRUE_IN_DEBUG_MODE));
78
79const cl::OptionCategory * codegen_flags() {return &CodeGenOptions;}
80
81bool DebugOptionIsSet(DebugFlags flag) {return DebugOptions.isSet(flag);}
82
83static cl::opt<bool> pipelineParallel("enable-pipeline-parallel", cl::desc("Enable multithreading with pipeline parallelism."), cl::cat(CodeGenOptions));
84   
85static cl::opt<bool> segmentPipelineParallel("enable-segment-pipeline-parallel", cl::desc("Enable multithreading with segment pipeline parallelism."), cl::cat(CodeGenOptions));
86   
87
88   
89#ifdef CUDA_ENABLED
90bool NVPTX;
91int GroupNum;
92static cl::opt<bool> USENVPTX("NVPTX", cl::desc("Run on GPU only."), cl::init(false));
93static cl::opt<int, true> GroupNumOption("group-num", cl::location(GroupNum), cl::desc("NUmber of groups declared on GPU"), cl::value_desc("positive integer"), cl::init(256));
94#endif
95
96}
97
98
99#ifdef CUDA_ENABLED
100void setNVPTXOption(){
101    codegen::NVPTX = codegen::USENVPTX;
102}
103
104void Compile2PTX (Module * m, std::string IRFilename, std::string PTXFilename) {
105    InitializeAllTargets();
106    InitializeAllTargetMCs();
107    InitializeAllAsmPrinters();
108    InitializeAllAsmParsers();
109
110    PassRegistry *Registry = PassRegistry::getPassRegistry();
111    initializeCore(*Registry);
112    initializeCodeGen(*Registry);
113    initializeLoopStrengthReducePass(*Registry);
114    initializeLowerIntrinsicsPass(*Registry);
115    initializeUnreachableBlockElimPass(*Registry);
116
117    std::error_code error;
118    raw_fd_ostream out(IRFilename, error, sys::fs::OpenFlags::F_None);
119    m->print(out, nullptr);
120
121    if (LLVM_UNLIKELY(codegen::DebugOptionIsSet(codegen::ShowIR)))
122            m->dump();
123
124    llvm2ptx(IRFilename, PTXFilename);
125}
126#endif
127
128
129void setAllFeatures(EngineBuilder &builder) {
130    StringMap<bool> HostCPUFeatures;
131    if (sys::getHostCPUFeatures(HostCPUFeatures)) {
132        std::vector<std::string> attrs;
133        for (auto &flag : HostCPUFeatures) {
134            auto enabled = flag.second ? "+" : "-";
135            attrs.push_back(enabled + flag.first().str());
136        }
137        builder.setMAttrs(attrs);
138    }
139}
140
141bool AVX2_available() {
142    StringMap<bool> HostCPUFeatures;
143    if (sys::getHostCPUFeatures(HostCPUFeatures)) {
144        auto f = HostCPUFeatures.find("avx2");
145        return ((f != HostCPUFeatures.end()) && f->second);
146    }
147    return false;
148}
149
150#ifndef USE_LLVM_3_6
151void WriteAssembly (TargetMachine *TM, Module * m) {
152    legacy::PassManager PM;
153
154    SmallString<128> Str;
155    raw_svector_ostream dest(Str);
156
157    if (TM->addPassesToEmitFile(PM, dest, TargetMachine::CGFT_AssemblyFile ) ) {
158        throw std::runtime_error("LLVM error: addPassesToEmitFile failed.");
159    }
160    PM.run(*m);
161
162    if (codegen::ASMOutputFilename.empty()) {
163        errs() << Str;
164    } else {
165        std::error_code error;
166        raw_fd_ostream out(codegen::ASMOutputFilename, error, sys::fs::OpenFlags::F_None);
167        out << Str;
168    }
169}
170#endif
171
172ExecutionEngine * JIT_to_ExecutionEngine (Module * m) {
173
174    // Use the pass manager to optimize the function.
175    legacy::PassManager PM;
176    #ifndef NDEBUG
177    PM.add(createVerifierPass());
178    #endif
179    PM.add(createReassociatePass());             //Reassociate expressions.
180    PM.add(createGVNPass());                     //Eliminate common subexpressions.
181    PM.add(createInstructionCombiningPass());    //Simple peephole optimizations and bit-twiddling.
182    PM.add(createCFGSimplificationPass());   
183    PM.run(*m);
184
185    InitializeNativeTarget();
186    InitializeNativeTargetAsmPrinter();
187    InitializeNativeTargetAsmParser();
188
189    PassRegistry * Registry = PassRegistry::getPassRegistry();
190    initializeCore(*Registry);
191    initializeCodeGen(*Registry);
192    initializeLowerIntrinsicsPass(*Registry);
193
194    std::string errMessage;
195    EngineBuilder builder{std::unique_ptr<Module>(m)};
196    builder.setErrorStr(&errMessage);
197    TargetOptions opts = InitTargetOptionsFromCodeGenFlags();
198    opts.MCOptions.AsmVerbose = codegen::AsmVerbose;
199
200    builder.setTargetOptions(opts);
201    builder.setVerifyModules(true);
202    CodeGenOpt::Level optLevel = CodeGenOpt::Level::None;
203    switch (codegen::OptLevel) {
204        case '0': optLevel = CodeGenOpt::None; break;
205        case '1': optLevel = CodeGenOpt::Less; break;
206        case '2': optLevel = CodeGenOpt::Default; break;
207        case '3': optLevel = CodeGenOpt::Aggressive; break;
208        default: errs() << codegen::OptLevel << " is an invalid optimization level.\n";
209    }
210    builder.setOptLevel(optLevel);
211
212    setAllFeatures(builder);
213
214    if (LLVM_UNLIKELY(codegen::DebugOptionIsSet(codegen::ShowIR))) {
215        if (codegen::IROutputFilename.empty()) {
216            m->dump();
217        } else {
218            std::error_code error;
219            raw_fd_ostream out(codegen::IROutputFilename, error, sys::fs::OpenFlags::F_None);
220            m->print(out, nullptr);
221        }
222    }
223#if LLVM_VERSION_MINOR > 6
224    if (codegen::DebugOptionIsSet(codegen::ShowASM)) {
225        WriteAssembly(builder.selectTarget(), m);
226    }
227#endif
228    ExecutionEngine * engine = builder.create();
229    if (engine == nullptr) {
230        throw std::runtime_error("Could not create ExecutionEngine: " + errMessage);
231    }
232    return engine;
233}
234
235void ApplyObjectCache(ExecutionEngine * e) {
236    ICGrepObjectCache * cache = nullptr;
237    if (codegen::EnableObjectCache) {
238        if (codegen::ObjectCacheDir.empty())
239            // Default is $HOME/.cache/icgrep
240            cache = new ICGrepObjectCache();
241        else
242            cache = new ICGrepObjectCache(codegen::ObjectCacheDir);
243        e->setObjectCache(cache);
244    }
245}
246
247void generatePipeline(IDISA::IDISA_Builder * iBuilder, const std::vector<kernel::KernelBuilder *> & kernels) {
248    if (codegen::pipelineParallel) {
249        generateParallelPipeline(iBuilder, kernels);
250    } else if (codegen::segmentPipelineParallel) {
251        generateSegmentParallelPipeline(iBuilder, kernels);
252    } else {
253        codegen::ThreadNum = 1;
254        generatePipelineLoop(iBuilder, kernels);
255    }
256}
257
258
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