source: icGREP/icgrep-devel/llvm-3.6.1.src/test/CodeGen/R600/copy-illegal-type.ll @ 4664

Last change on this file since 4664 was 4664, checked in by cameron, 4 years ago

Upgrade LLVM to 3.6.1

File size: 5.6 KB
Line 
1; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3
4; FUNC-LABEL: {{^}}test_copy_v4i8:
5; SI: buffer_load_dword [[REG:v[0-9]+]]
6; SI: buffer_store_dword [[REG]]
7; SI: s_endpgm
8define void @test_copy_v4i8(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
9  %val = load <4 x i8> addrspace(1)* %in, align 4
10  store <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
11  ret void
12}
13
14; FUNC-LABEL: {{^}}test_copy_v4i8_x2:
15; SI: buffer_load_dword [[REG:v[0-9]+]]
16; SI: buffer_store_dword [[REG]]
17; SI: buffer_store_dword [[REG]]
18; SI: s_endpgm
19define void @test_copy_v4i8_x2(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %in) nounwind {
20  %val = load <4 x i8> addrspace(1)* %in, align 4
21  store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
22  store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
23  ret void
24}
25
26; FUNC-LABEL: {{^}}test_copy_v4i8_x3:
27; SI: buffer_load_dword [[REG:v[0-9]+]]
28; SI: buffer_store_dword [[REG]]
29; SI: buffer_store_dword [[REG]]
30; SI: buffer_store_dword [[REG]]
31; SI: s_endpgm
32define void @test_copy_v4i8_x3(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %in) nounwind {
33  %val = load <4 x i8> addrspace(1)* %in, align 4
34  store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
35  store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
36  store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
37  ret void
38}
39
40; FUNC-LABEL: {{^}}test_copy_v4i8_x4:
41; SI: buffer_load_dword [[REG:v[0-9]+]]
42; SI: buffer_store_dword [[REG]]
43; SI: buffer_store_dword [[REG]]
44; SI: buffer_store_dword [[REG]]
45; SI: buffer_store_dword [[REG]]
46; SI: s_endpgm
47define void @test_copy_v4i8_x4(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %out3, <4 x i8> addrspace(1)* %in) nounwind {
48  %val = load <4 x i8> addrspace(1)* %in, align 4
49  store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
50  store <4 x i8> %val, <4 x i8> addrspace(1)* %out1, align 4
51  store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
52  store <4 x i8> %val, <4 x i8> addrspace(1)* %out3, align 4
53  ret void
54}
55
56; FUNC-LABEL: {{^}}test_copy_v4i8_extra_use:
57; SI: buffer_load_ubyte
58; SI: buffer_load_ubyte
59; SI: buffer_load_ubyte
60; SI: buffer_load_ubyte
61; SI-DAG: v_add
62; SI-DAG: v_add
63; SI-DAG: v_add
64; SI-DAG: v_add
65; SI-DAG: buffer_store_byte
66; SI-DAG: buffer_store_byte
67; SI-DAG: buffer_store_byte
68; SI-DAG: buffer_store_byte
69; SI-DAG: buffer_store_byte
70; SI-DAG: buffer_store_byte
71; SI-DAG: buffer_store_byte
72; SI_DAG: buffer_store_byte
73
74; After scalarizing v4i8 loads is fixed.
75; XSI: buffer_load_dword
76; XSI: V_BFE
77; XSI: V_ADD
78; XSI: V_ADD
79; XSI: V_ADD
80; XSI: buffer_store_dword
81; XSI: buffer_store_dword
82
83; SI: s_endpgm
84define void @test_copy_v4i8_extra_use(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %in) nounwind {
85  %val = load <4 x i8> addrspace(1)* %in, align 4
86  %add = add <4 x i8> %val, <i8 9, i8 9, i8 9, i8 9>
87  store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
88  store <4 x i8> %add, <4 x i8> addrspace(1)* %out1, align 4
89  ret void
90}
91
92; FUNC-LABEL: {{^}}test_copy_v4i8_x2_extra_use:
93; SI: buffer_load_ubyte
94; SI: buffer_load_ubyte
95; SI: buffer_load_ubyte
96; SI: buffer_load_ubyte
97; SI-DAG: v_add
98; SI-DAG: v_add
99; SI-DAG: v_add
100; SI-DAG: v_add
101; SI-DAG: buffer_store_byte
102; SI-DAG: buffer_store_byte
103; SI-DAG: buffer_store_byte
104; SI-DAG: buffer_store_byte
105; SI-DAG: buffer_store_byte
106; SI-DAG: buffer_store_byte
107; SI-DAG: buffer_store_byte
108; SI_DAG: buffer_store_byte
109; SI-DAG: buffer_store_byte
110; SI-DAG: buffer_store_byte
111; SI-DAG: buffer_store_byte
112; SI_DAG: buffer_store_byte
113
114; XSI: buffer_load_dword
115; XSI: BFE
116; XSI: buffer_store_dword
117; XSI: V_ADD
118; XSI: buffer_store_dword
119; XSI-NEXT: buffer_store_dword
120
121; SI: s_endpgm
122define void @test_copy_v4i8_x2_extra_use(<4 x i8> addrspace(1)* %out0, <4 x i8> addrspace(1)* %out1, <4 x i8> addrspace(1)* %out2, <4 x i8> addrspace(1)* %in) nounwind {
123  %val = load <4 x i8> addrspace(1)* %in, align 4
124  %add = add <4 x i8> %val, <i8 9, i8 9, i8 9, i8 9>
125  store <4 x i8> %val, <4 x i8> addrspace(1)* %out0, align 4
126  store <4 x i8> %add, <4 x i8> addrspace(1)* %out1, align 4
127  store <4 x i8> %val, <4 x i8> addrspace(1)* %out2, align 4
128  ret void
129}
130
131; FUNC-LABEL: {{^}}test_copy_v3i8:
132; SI-NOT: bfe
133; SI-NOT: bfi
134; SI: s_endpgm
135define void @test_copy_v3i8(<3 x i8> addrspace(1)* %out, <3 x i8> addrspace(1)* %in) nounwind {
136  %val = load <3 x i8> addrspace(1)* %in, align 4
137  store <3 x i8> %val, <3 x i8> addrspace(1)* %out, align 4
138  ret void
139}
140
141; FUNC-LABEL: {{^}}test_copy_v4i8_volatile_load:
142; SI: buffer_load_ubyte
143; SI: buffer_load_ubyte
144; SI: buffer_load_ubyte
145; SI: buffer_load_ubyte
146; SI: s_endpgm
147define void @test_copy_v4i8_volatile_load(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
148  %val = load volatile <4 x i8> addrspace(1)* %in, align 4
149  store <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
150  ret void
151}
152
153; FUNC-LABEL: {{^}}test_copy_v4i8_volatile_store:
154; SI: buffer_load_ubyte
155; SI: buffer_load_ubyte
156; SI: buffer_load_ubyte
157; SI: buffer_load_ubyte
158; SI: buffer_store_byte
159; SI: buffer_store_byte
160; SI: buffer_store_byte
161; SI: buffer_store_byte
162; SI: s_endpgm
163define void @test_copy_v4i8_volatile_store(<4 x i8> addrspace(1)* %out, <4 x i8> addrspace(1)* %in) nounwind {
164  %val = load <4 x i8> addrspace(1)* %in, align 4
165  store volatile <4 x i8> %val, <4 x i8> addrspace(1)* %out, align 4
166  ret void
167}
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