source: icGREP/icgrep-devel/llvm-3.6.1.src/test/CodeGen/R600/llvm.AMDGPU.clamp.ll @ 4664

Last change on this file since 4664 was 4664, checked in by cameron, 4 years ago

Upgrade LLVM to 3.6.1

File size: 3.0 KB
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1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
4
5declare float @llvm.fabs.f32(float) nounwind readnone
6declare float @llvm.AMDGPU.clamp.f32(float, float, float) nounwind readnone
7declare float @llvm.AMDIL.clamp.f32(float, float, float) nounwind readnone
8
9; FUNC-LABEL: {{^}}clamp_0_1_f32:
10; SI: s_load_dword [[ARG:s[0-9]+]],
11; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, [[ARG]] clamp{{$}}
12; SI: buffer_store_dword [[RESULT]]
13; SI: s_endpgm
14
15; EG: MOV_SAT
16define void @clamp_0_1_f32(float addrspace(1)* %out, float %src) nounwind {
17  %clamp = call float @llvm.AMDGPU.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone
18  store float %clamp, float addrspace(1)* %out, align 4
19  ret void
20}
21
22; FUNC-LABEL: {{^}}clamp_fabs_0_1_f32:
23; SI: s_load_dword [[ARG:s[0-9]+]],
24; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, |[[ARG]]| clamp{{$}}
25; SI: buffer_store_dword [[RESULT]]
26; SI: s_endpgm
27define void @clamp_fabs_0_1_f32(float addrspace(1)* %out, float %src) nounwind {
28  %src.fabs = call float @llvm.fabs.f32(float %src) nounwind readnone
29  %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fabs, float 0.0, float 1.0) nounwind readnone
30  store float %clamp, float addrspace(1)* %out, align 4
31  ret void
32}
33
34; FUNC-LABEL: {{^}}clamp_fneg_0_1_f32:
35; SI: s_load_dword [[ARG:s[0-9]+]],
36; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, -[[ARG]] clamp{{$}}
37; SI: buffer_store_dword [[RESULT]]
38; SI: s_endpgm
39define void @clamp_fneg_0_1_f32(float addrspace(1)* %out, float %src) nounwind {
40  %src.fneg = fsub float -0.0, %src
41  %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fneg, float 0.0, float 1.0) nounwind readnone
42  store float %clamp, float addrspace(1)* %out, align 4
43  ret void
44}
45
46; FUNC-LABEL: {{^}}clamp_fneg_fabs_0_1_f32:
47; SI: s_load_dword [[ARG:s[0-9]+]],
48; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, -|[[ARG]]| clamp{{$}}
49; SI: buffer_store_dword [[RESULT]]
50; SI: s_endpgm
51define void @clamp_fneg_fabs_0_1_f32(float addrspace(1)* %out, float %src) nounwind {
52  %src.fabs = call float @llvm.fabs.f32(float %src) nounwind readnone
53  %src.fneg.fabs = fsub float -0.0, %src.fabs
54  %clamp = call float @llvm.AMDGPU.clamp.f32(float %src.fneg.fabs, float 0.0, float 1.0) nounwind readnone
55  store float %clamp, float addrspace(1)* %out, align 4
56  ret void
57}
58
59; FUNC-LABEL: {{^}}clamp_0_1_amdil_legacy_f32:
60; SI: s_load_dword [[ARG:s[0-9]+]],
61; SI: v_add_f32_e64 [[RESULT:v[0-9]+]], 0, [[ARG]] clamp{{$}}
62; SI: buffer_store_dword [[RESULT]]
63define void @clamp_0_1_amdil_legacy_f32(float addrspace(1)* %out, float %src) nounwind {
64  %clamp = call float @llvm.AMDIL.clamp.f32(float %src, float 0.0, float 1.0) nounwind readnone
65  store float %clamp, float addrspace(1)* %out, align 4
66  ret void
67}
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