source: icGREP/icgrep-devel/llvm-3.6.1.src/test/CodeGen/R600/local-memory-two-objects.ll @ 4664

Last change on this file since 4664 was 4664, checked in by cameron, 4 years ago

Upgrade LLVM to 3.6.1

File size: 2.7 KB
Line 
1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
2; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=GCN --check-prefix=SI %s
3; RUN: llc < %s -march=amdgcn -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=GCN --check-prefix=CI %s
4
5@local_memory_two_objects.local_mem0 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
6@local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4
7
8; EG: {{^}}local_memory_two_objects:
9
10; Check that the LDS size emitted correctly
11; EG: .long 166120
12; EG-NEXT: .long 8
13; GCN: .long 47180
14; GCN-NEXT: .long 38792
15
16; We would like to check the the lds writes are using different
17; addresses, but due to variations in the scheduler, we can't do
18; this consistently on evergreen GPUs.
19; EG: LDS_WRITE
20; EG: LDS_WRITE
21; GCN: ds_write_b32 {{v[0-9]*}}, v[[ADDRW:[0-9]*]]
22; GCN-NOT: ds_write_b32 {{v[0-9]*}}, v[[ADDRW]]
23
24; GROUP_BARRIER must be the last instruction in a clause
25; EG: GROUP_BARRIER
26; EG-NEXT: ALU clause
27
28; Make sure the lds reads are using different addresses, at different
29; constant offsets.
30; EG: LDS_READ_RET {{[*]*}} OQAP, {{PV|T}}[[ADDRR:[0-9]*\.[XYZW]]]
31; EG-NOT: LDS_READ_RET {{[*]*}} OQAP, T[[ADDRR]]
32; SI: v_add_i32_e32 [[SIPTR:v[0-9]+]], 16, v{{[0-9]+}}
33; SI: ds_read_b32 {{v[0-9]+}}, [[SIPTR]] [M0]
34; CI: ds_read_b32 {{v[0-9]+}}, [[ADDRR:v[0-9]+]] offset:16 [M0]
35; CI: ds_read_b32 {{v[0-9]+}}, [[ADDRR]] [M0]
36
37define void @local_memory_two_objects(i32 addrspace(1)* %out) {
38entry:
39  %x.i = call i32 @llvm.r600.read.tidig.x() #0
40  %arrayidx = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i
41  store i32 %x.i, i32 addrspace(3)* %arrayidx, align 4
42  %mul = shl nsw i32 %x.i, 1
43  %arrayidx1 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %x.i
44  store i32 %mul, i32 addrspace(3)* %arrayidx1, align 4
45  %sub = sub nsw i32 3, %x.i
46  call void @llvm.AMDGPU.barrier.local()
47  %arrayidx2 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %sub
48  %0 = load i32 addrspace(3)* %arrayidx2, align 4
49  %arrayidx3 = getelementptr inbounds i32 addrspace(1)* %out, i32 %x.i
50  store i32 %0, i32 addrspace(1)* %arrayidx3, align 4
51  %arrayidx4 = getelementptr inbounds [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem1, i32 0, i32 %sub
52  %1 = load i32 addrspace(3)* %arrayidx4, align 4
53  %add = add nsw i32 %x.i, 4
54  %arrayidx5 = getelementptr inbounds i32 addrspace(1)* %out, i32 %add
55  store i32 %1, i32 addrspace(1)* %arrayidx5, align 4
56  ret void
57}
58
59declare i32 @llvm.r600.read.tidig.x() #0
60declare void @llvm.AMDGPU.barrier.local()
61
62attributes #0 = { readnone }
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