source: icGREP/icgrep-devel/llvm-3.6.1.src/test/CodeGen/R600/vselect.ll @ 4664

Last change on this file since 4664 was 4664, checked in by cameron, 4 years ago

Upgrade LLVM to 3.6.1

File size: 3.2 KB
Line 
1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
2;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI %s
3;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI %s
4
5;EG: {{^}}test_select_v2i32:
6;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
7;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
8
9;SI: {{^}}test_select_v2i32:
10;SI: v_cndmask_b32_e64
11;SI: v_cndmask_b32_e64
12
13define void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) {
14entry:
15  %0 = load <2 x i32> addrspace(1)* %in0
16  %1 = load <2 x i32> addrspace(1)* %in1
17  %cmp = icmp ne <2 x i32> %0, %1
18  %result = select <2 x i1> %cmp, <2 x i32> %0, <2 x i32> %1
19  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
20  ret void
21}
22
23;EG: {{^}}test_select_v2f32:
24;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26
27;SI: {{^}}test_select_v2f32:
28;SI: v_cndmask_b32_e64
29;SI: v_cndmask_b32_e64
30
31define void @test_select_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in0, <2 x float> addrspace(1)* %in1) {
32entry:
33  %0 = load <2 x float> addrspace(1)* %in0
34  %1 = load <2 x float> addrspace(1)* %in1
35  %cmp = fcmp une <2 x float> %0, %1
36  %result = select <2 x i1> %cmp, <2 x float> %0, <2 x float> %1
37  store <2 x float> %result, <2 x float> addrspace(1)* %out
38  ret void
39}
40
41;EG: {{^}}test_select_v4i32:
42;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
43;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
44;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
45;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
46
47;SI: {{^}}test_select_v4i32:
48;SI: v_cndmask_b32_e64
49;SI: v_cndmask_b32_e64
50;SI: v_cndmask_b32_e64
51;SI: v_cndmask_b32_e64
52
53define void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) {
54entry:
55  %0 = load <4 x i32> addrspace(1)* %in0
56  %1 = load <4 x i32> addrspace(1)* %in1
57  %cmp = icmp ne <4 x i32> %0, %1
58  %result = select <4 x i1> %cmp, <4 x i32> %0, <4 x i32> %1
59  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
60  ret void
61}
62
63;EG: {{^}}test_select_v4f32:
64;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
65;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
66;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
67;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
68
69define void @test_select_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in0, <4 x float> addrspace(1)* %in1) {
70entry:
71  %0 = load <4 x float> addrspace(1)* %in0
72  %1 = load <4 x float> addrspace(1)* %in1
73  %cmp = fcmp une <4 x float> %0, %1
74  %result = select <4 x i1> %cmp, <4 x float> %0, <4 x float> %1
75  store <4 x float> %result, <4 x float> addrspace(1)* %out
76  ret void
77}
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