source: icGREP/icgrep-devel/llvm-3.8.0.src/CREDITS.TXT @ 5859

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[5027]1This file is a partial list of people who have contributed to the LLVM
2project.  If you have contributed a patch or made some other contribution to
3LLVM, please submit a patch to this file to add yourself, and it will be
4done!
5
6The list is sorted by surname and formatted to allow easy grepping and
7beautification by scripts.  The fields are: name (N), email (E), web-address
8(W), PGP key ID and fingerprint (P), description (D), snail-mail address
9(S), and (I) IRC handle.
10
11
12N: Vikram Adve
13E: vadve@cs.uiuc.edu
14W: http://www.cs.uiuc.edu/~vadve/
15D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
16
17N: Owen Anderson
18E: resistor@mac.com
19D: LCSSA pass and related LoopUnswitch work
20D: GVNPRE pass, DataLayout refactoring, random improvements
21
22N: Henrik Bach
23D: MingW Win32 API portability layer
24
25N: Aaron Ballman
26E: aaron@aaronballman.com
27D: __declspec attributes, Windows support, general bug fixing
28
29N: Nate Begeman
30E: natebegeman@mac.com
31D: PowerPC backend developer
32D: Target-independent code generator and analysis improvements
33
34N: Daniel Berlin
35E: dberlin@dberlin.org
36D: ET-Forest implementation.
37D: Sparse bitmap
38
39N: David Blaikie
40E: dblaikie@gmail.com
41D: General bug fixing/fit & finish, mostly in Clang
42
43N: Neil Booth
44E: neil@daikokuya.co.uk
45D: APFloat implementation.
46
47N: Misha Brukman
48E: brukman+llvm@uiuc.edu
49W: http://misha.brukman.net
50D: Portions of X86 and Sparc JIT compilers, PowerPC backend
51D: Incremental bitcode loader
52
53N: Cameron Buschardt
54E: buschard@uiuc.edu
55D: The `mem2reg' pass - promotes values stored in memory to registers
56
57N: Brendon Cahoon
58E: bcahoon@codeaurora.org
59D: Loop unrolling with run-time trip counts.
60
61N: Chandler Carruth
62E: chandlerc@gmail.com
63E: chandlerc@google.com
64D: Hashing algorithms and interfaces
65D: Inline cost analysis
66D: Machine block placement pass
67D: SROA
68
69N: Casey Carter
70E: ccarter@uiuc.edu
71D: Fixes to the Reassociation pass, various improvement patches
72
73N: Evan Cheng
74E: evan.cheng@apple.com
75D: ARM and X86 backends
76D: Instruction scheduler improvements
77D: Register allocator improvements
78D: Loop optimizer improvements
79D: Target-independent code generator improvements
80
81N: Dan Villiom Podlaski Christiansen
82E: danchr@gmail.com
83E: danchr@cs.au.dk
84W: http://villiom.dk
85D: LLVM Makefile improvements
86D: Clang diagnostic & driver tweaks
87S: Aarhus, Denmark
88
89N: Jeff Cohen
90E: jeffc@jolt-lang.org
91W: http://jolt-lang.org
92D: Native Win32 API portability layer
93
94N: John T. Criswell
95E: criswell@uiuc.edu
96D: Original Autoconf support, documentation improvements, bug fixes
97
98N: Anshuman Dasgupta
99E: adasgupt@codeaurora.org
100D: Deterministic finite automaton based infrastructure for VLIW packetization
101
102N: Stefanus Du Toit
103E: stefanus.du.toit@intel.com
104D: Bug fixes and minor improvements
105
106N: Rafael Avila de Espindola
107E: rafael.espindola@gmail.com
108D: The ARM backend
109
110N: Dave Estes
111E: cestes@codeaurora.org
112D: AArch64 machine description for Cortex-A53
113
114N: Alkis Evlogimenos
115E: alkis@evlogimenos.com
116D: Linear scan register allocator, many codegen improvements, Java frontend
117
118N: Hal Finkel
119E: hfinkel@anl.gov
120D: Basic-block autovectorization, PowerPC backend improvements
121
122N: Eric Fiselier
123E: eric@efcs.ca
124D: LIT patches and documentation.
125
126N: Ryan Flynn
127E: pizza@parseerror.com
128D: Miscellaneous bug fixes
129
130N: Brian Gaeke
131E: gaeke@uiuc.edu
132W: http://www.students.uiuc.edu/~gaeke/
133D: Portions of X86 static and JIT compilers; initial SparcV8 backend
134D: Dynamic trace optimizer
135D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
136
137N: Nicolas Geoffray
138E: nicolas.geoffray@lip6.fr
139W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
140D: PPC backend fixes for Linux
141
142N: Louis Gerbarg
143E: lgg@apple.com
144D: Portions of the PowerPC backend
145
146N: Saem Ghani
147E: saemghani@gmail.com
148D: Callgraph class cleanups
149
150N: Mikhail Glushenkov
151E: foldr@codedgers.com
152D: Author of llvmc2
153
154N: Dan Gohman
155E: sunfish@mozilla.com
156D: Miscellaneous bug fixes
157D: WebAssembly Backend
158
159N: David Goodwin
160E: david@goodwinz.net
161D: Thumb-2 code generator
162
163N: David Greene
164E: greened@obbligato.org
165D: Miscellaneous bug fixes
166D: Register allocation refactoring
167
168N: Gabor Greif
169E: ggreif@gmail.com
170D: Improvements for space efficiency
171
172N: James Grosbach
173E: grosbach@apple.com
174I: grosbach
175D: SjLj exception handling support
176D: General fixes and improvements for the ARM back-end
177D: MCJIT
178D: ARM integrated assembler and assembly parser
179D: Led effort for the backend formerly known as ARM64
180
181N: Lang Hames
182E: lhames@gmail.com
183D: PBQP-based register allocator
184
185N: Gordon Henriksen
186E: gordonhenriksen@mac.com
187D: Pluggable GC support
188D: C interface
189D: Ocaml bindings
190
191N: Raul Fernandes Herbster
192E: raul@dsc.ufcg.edu.br
193D: JIT support for ARM
194
195N: Paolo Invernizzi
196E: arathorn@fastwebnet.it
197D: Visual C++ compatibility fixes
198
199N: Patrick Jenkins
200E: patjenk@wam.umd.edu
201D: Nightly Tester
202
203N: Dale Johannesen
204E: dalej@apple.com
205D: ARM constant islands improvements
206D: Tail merging improvements
207D: Rewrite X87 back end
208D: Use APFloat for floating point constants widely throughout compiler
209D: Implement X87 long double
210
211N: Brad Jones
212E: kungfoomaster@nondot.org
213D: Support for packed types
214
215N: Rod Kay
216E: rkay@auroraux.org
217D: Author of LLVM Ada bindings
218
219N: Eric Kidd
220W: http://randomhacks.net/
221D: llvm-config script
222
223N: Anton Korobeynikov
224E: asl@math.spbu.ru
225D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
226D: x86/linux PIC codegen, aliases, regparm/visibility attributes
227D: Switch lowering refactoring
228
229N: Sumant Kowshik
230E: kowshik@uiuc.edu
231D: Author of the original C backend
232
233N: Benjamin Kramer
234E: benny.kra@gmail.com
235D: Miscellaneous bug fixes
236
237N: Sundeep Kushwaha
238E: sundeepk@codeaurora.org
239D: Implemented DFA-based target independent VLIW packetizer
240
241N: Christopher Lamb
242E: christopher.lamb@gmail.com
243D: aligned load/store support, parts of noalias and restrict support
244D: vreg subreg infrastructure, X86 codegen improvements based on subregs
245D: address spaces
246
247N: Jim Laskey
248E: jlaskey@apple.com
249D: Improvements to the PPC backend, instruction scheduling
250D: Debug and Dwarf implementation
251D: Auto upgrade mangler
252D: llvm-gcc4 svn wrangler
253
254N: Chris Lattner
255E: sabre@nondot.org
256W: http://nondot.org/~sabre/
257D: Primary architect of LLVM
258
259N: Tanya Lattner (Tanya Brethour)
260E: tonic@nondot.org
261W: http://nondot.org/~tonic/
262D: The initial llvm-ar tool, converted regression testsuite to dejagnu
263D: Modulo scheduling in the SparcV9 backend
264D: Release manager (1.7+)
265
266N: Sylvestre Ledru
267E: sylvestre@debian.org
268W: http://sylvestre.ledru.info/
269W: http://llvm.org/apt/
270D: Debian and Ubuntu packaging
271D: Continuous integration with jenkins
272
273N: Andrew Lenharth
274E: alenhar2@cs.uiuc.edu
275W: http://www.lenharth.org/~andrewl/
276D: Alpha backend
277D: Sampling based profiling
278
279N: Nick Lewycky
280E: nicholas@mxc.ca
281D: PredicateSimplifier pass
282
283N: Tony Linthicum, et. al.
284E: tlinth@codeaurora.org
285D: Backend for Qualcomm's Hexagon VLIW processor.
286
287N: Bruno Cardoso Lopes
288E: bruno.cardoso@gmail.com
289I: bruno
290W: http://brunocardoso.cc
291D: Mips backend
292D: Random ARM integrated assembler and assembly parser improvements
293D: General X86 AVX1 support
294
295N: Duraid Madina
296E: duraid@octopus.com.au
297W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
298D: IA64 backend, BigBlock register allocator
299
300N: John McCall
301E: rjmccall@apple.com
302D: Clang semantic analysis and IR generation
303
304N: Michael McCracken
305E: michael.mccracken@gmail.com
306D: Line number support for llvmgcc
307
308N: Vladimir Merzliakov
309E: wanderer@rsu.ru
310D: Test suite fixes for FreeBSD
311
312N: Scott Michel
313E: scottm@aero.org
314D: Added STI Cell SPU backend.
315
316N: Kai Nacke
317E: kai@redstar.de
318D: Support for implicit TLS model used with MS VC runtime
319D: Dumping of Win64 EH structures
320
321N: Takumi Nakamura
322E: geek4civic@gmail.com
323E: chapuni@hf.rim.or.jp
324D: Cygwin and MinGW support.
325D: Win32 tweaks.
326S: Yokohama, Japan
327
328N: Edward O'Callaghan
329E: eocallaghan@auroraux.org
330W: http://www.auroraux.org
331D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
332D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
333D: and error clean ups.
334
335N: Morten Ofstad
336E: morten@hue.no
337D: Visual C++ compatibility fixes
338
339N: Jakob Stoklund Olesen
340E: stoklund@2pi.dk
341D: Machine code verifier
342D: Blackfin backend
343D: Fast register allocator
344D: Greedy register allocator
345
346N: Richard Osborne
347E: richard@xmos.com
348D: XCore backend
349
350N: Devang Patel
351E: dpatel@apple.com
352D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
353D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
354D: Optimizer improvements, Loop Index Split
355
356N: Ana Pazos
357E: apazos@codeaurora.org
358D: Fixes and improvements to the AArch64 backend
359
360N: Wesley Peck
361E: peckw@wesleypeck.com
362W: http://wesleypeck.com/
363D: MicroBlaze backend
364
365N: Francois Pichet
366E: pichet2000@gmail.com
367D: MSVC support
368
369N: Vladimir Prus
370W: http://vladimir_prus.blogspot.com
371E: ghost@cs.msu.su
372D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
373
374N: Kalle Raiskila
375E: kalle.rasikila@nokia.com
376D: Some bugfixes to CellSPU
377
378N: Xerxes Ranby
379E: xerxes@zafena.se
380D: Cmake dependency chain and various bug fixes
381
382N: Alex Rosenberg
383E: alexr@leftfield.org
384I: arosenberg
385D: ARM calling conventions rewrite, hard float support
386
387N: Chad Rosier
388E: mcrosier@codeaurora.org
389I: mcrosier
390D: AArch64 fast instruction selection pass
391D: Fixes and improvements to the ARM fast-isel pass
392D: Fixes and improvements to the AArch64 backend
393
394N: Nadav Rotem
395E: nrotem@apple.com
396D: X86 code generation improvements, Loop Vectorizer.
397
398N: Roman Samoilov
399E: roman@codedgers.com
400D: MSIL backend
401
402N: Duncan Sands
403E: baldrick@free.fr
404I: baldrick
405D: Ada support in llvm-gcc
406D: Dragonegg plugin
407D: Exception handling improvements
408D: Type legalizer rewrite
409
410N: Ruchira Sasanka
411E: sasanka@uiuc.edu
412D: Graph coloring register allocator for the Sparc64 backend
413
414N: Arnold Schwaighofer
415E: arnold.schwaighofer@gmail.com
416D: Tail call optimization for the x86 backend
417
418N: Shantonu Sen
419E: ssen@apple.com
420D: Miscellaneous bug fixes
421
422N: Anand Shukla
423E: ashukla@cs.uiuc.edu
424D: The `paths' pass
425
426N: Michael J. Spencer
427E: bigcheesegs@gmail.com
428D: Shepherding Windows COFF support into MC.
429D: Lots of Windows stuff.
430
431N: Reid Spencer
432E: rspencer@reidspencer.com
433W: http://reidspencer.com/
434D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
435
436N: Alp Toker
437E: alp@nuanti.com
438W: http://atoker.com/
439D: C++ frontend next generation standards implementation
440
441N: Craig Topper
442E: craig.topper@gmail.com
443D: X86 codegen and disassembler improvements. AVX2 support.
444
445N: Edwin Torok
446E: edwintorok@gmail.com
447D: Miscellaneous bug fixes
448
449N: Adam Treat
450E: manyoso@yahoo.com
451D: C++ bugs filed, and C++ front-end bug fixes.
452
453N: Lauro Ramos Venancio
454E: lauro.venancio@indt.org.br
455D: ARM backend improvements
456D: Thread Local Storage implementation
457
458N: Bill Wendling
459I: wendling
460E: isanbard@gmail.com
461D: Release manager, IR Linker, LTO
462D: Bunches of stuff
463
464N: Bob Wilson
465E: bob.wilson@acm.org
466D: Advanced SIMD (NEON) support in the ARM backend.
467
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