source: icGREP/icgrep-devel/llvm-3.8.0.src/test/Analysis/ScalarEvolution/nsw.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

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1; RUN: opt < %s -analyze -scalar-evolution | FileCheck %s
2
3; The addrecs in this loop are analyzable only by using nsw information.
4
5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
6
7; CHECK: Classifying expressions for: @test1
8define void @test1(double* %p) nounwind {
9entry:
10        %tmp = load double, double* %p, align 8         ; <double> [#uses=1]
11        %tmp1 = fcmp ogt double %tmp, 2.000000e+00              ; <i1> [#uses=1]
12        br i1 %tmp1, label %bb.nph, label %return
13
14bb.nph:         ; preds = %entry
15        br label %bb
16
17bb:             ; preds = %bb1, %bb.nph
18        %i.01 = phi i32 [ %tmp8, %bb1 ], [ 0, %bb.nph ]         ; <i32> [#uses=3]
19; CHECK: %i.01
20; CHECK-NEXT: -->  {0,+,1}<nuw><nsw><%bb>
21        %tmp2 = sext i32 %i.01 to i64           ; <i64> [#uses=1]
22        %tmp3 = getelementptr double, double* %p, i64 %tmp2             ; <double*> [#uses=1]
23        %tmp4 = load double, double* %tmp3, align 8             ; <double> [#uses=1]
24        %tmp5 = fmul double %tmp4, 9.200000e+00         ; <double> [#uses=1]
25        %tmp6 = sext i32 %i.01 to i64           ; <i64> [#uses=1]
26        %tmp7 = getelementptr double, double* %p, i64 %tmp6             ; <double*> [#uses=1]
27; CHECK: %tmp7
28; CHECK-NEXT:   -->  {%p,+,8}<%bb>
29        store double %tmp5, double* %tmp7, align 8
30        %tmp8 = add nsw i32 %i.01, 1            ; <i32> [#uses=2]
31; CHECK: %tmp8
32; CHECK-NEXT: -->  {1,+,1}<nuw><nsw><%bb>
33        br label %bb1
34
35bb1:            ; preds = %bb
36        %phitmp = sext i32 %tmp8 to i64         ; <i64> [#uses=1]
37; CHECK: %phitmp
38; CHECK-NEXT: -->  {1,+,1}<nuw><nsw><%bb>
39        %tmp9 = getelementptr double, double* %p, i64 %phitmp           ; <double*> [#uses=1]
40; CHECK: %tmp9
41; CHECK-NEXT:  -->  {(8 + %p),+,8}<%bb>
42        %tmp10 = load double, double* %tmp9, align 8            ; <double> [#uses=1]
43        %tmp11 = fcmp ogt double %tmp10, 2.000000e+00           ; <i1> [#uses=1]
44        br i1 %tmp11, label %bb, label %bb1.return_crit_edge
45
46bb1.return_crit_edge:           ; preds = %bb1
47        br label %return
48
49return:         ; preds = %bb1.return_crit_edge, %entry
50        ret void
51}
52
53; CHECK: Classifying expressions for: @test2
54define void @test2(i32* %begin, i32* %end) ssp {
55entry:
56  %cmp1.i.i = icmp eq i32* %begin, %end
57  br i1 %cmp1.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.lr.ph.i.i
58
59for.body.lr.ph.i.i:                               ; preds = %entry
60  br label %for.body.i.i
61
62for.body.i.i:                                     ; preds = %for.body.i.i, %for.body.lr.ph.i.i
63  %__first.addr.02.i.i = phi i32* [ %begin, %for.body.lr.ph.i.i ], [ %ptrincdec.i.i, %for.body.i.i ]
64; CHECK: %__first.addr.02.i.i
65; CHECK-NEXT: -->  {%begin,+,4}<nuw><%for.body.i.i>
66  store i32 0, i32* %__first.addr.02.i.i, align 4
67  %ptrincdec.i.i = getelementptr inbounds i32, i32* %__first.addr.02.i.i, i64 1
68; CHECK: %ptrincdec.i.i
69; CHECK-NEXT: -->  {(4 + %begin),+,4}<nuw><%for.body.i.i>
70  %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end
71  br i1 %cmp.i.i, label %for.cond.for.end_crit_edge.i.i, label %for.body.i.i
72
73for.cond.for.end_crit_edge.i.i:                   ; preds = %for.body.i.i
74  br label %_ZSt4fillIPiiEvT_S1_RKT0_.exit
75
76_ZSt4fillIPiiEvT_S1_RKT0_.exit:                   ; preds = %entry, %for.cond.for.end_crit_edge.i.i
77  ret void
78}
79
80; Various checks for inbounds geps.
81define void @test3(i32* %begin, i32* %end) nounwind ssp {
82entry:
83  %cmp7.i.i = icmp eq i32* %begin, %end
84  br i1 %cmp7.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i
85
86for.body.i.i:                                     ; preds = %entry, %for.body.i.i
87  %indvar.i.i = phi i64 [ %tmp, %for.body.i.i ], [ 0, %entry ]
88; CHECK: %indvar.i.i
89; CHECK: {0,+,1}<nuw><nsw><%for.body.i.i>
90  %tmp = add nsw i64 %indvar.i.i, 1
91; CHECK: %tmp =
92; CHECK: {1,+,1}<nuw><nsw><%for.body.i.i>
93  %ptrincdec.i.i = getelementptr inbounds i32, i32* %begin, i64 %tmp
94; CHECK: %ptrincdec.i.i =
95; CHECK: {(4 + %begin),+,4}<nsw><%for.body.i.i>
96  %__first.addr.08.i.i = getelementptr inbounds i32, i32* %begin, i64 %indvar.i.i
97; CHECK: %__first.addr.08.i.i
98; CHECK: {%begin,+,4}<nsw><%for.body.i.i>
99  store i32 0, i32* %__first.addr.08.i.i, align 4
100  %cmp.i.i = icmp eq i32* %ptrincdec.i.i, %end
101  br i1 %cmp.i.i, label %_ZSt4fillIPiiEvT_S1_RKT0_.exit, label %for.body.i.i
102; CHECK: Loop %for.body.i.i: backedge-taken count is ((-4 + (-1 * %begin) + %end) /u 4)
103; CHECK: Loop %for.body.i.i: max backedge-taken count is ((-4 + (-1 * %begin) + %end) /u 4)
104_ZSt4fillIPiiEvT_S1_RKT0_.exit:                   ; preds = %for.body.i.i, %entry
105  ret void
106}
107
108; A single AddExpr exists for (%a + %b), which is not always <nsw>.
109; CHECK: @addnsw
110; CHECK-NOT: --> (%a + %b)<nsw>
111define i32 @addnsw(i32 %a, i32 %b) nounwind ssp {
112entry:
113  %tmp = add i32 %a, %b
114  %cmp = icmp sgt i32 %tmp, 0
115  br i1 %cmp, label %greater, label %exit
116
117greater:
118  %tmp2 = add nsw i32 %a, %b
119  br label %exit
120
121exit:
122  %result = phi i32 [ %a, %entry ], [ %tmp2, %greater ]
123  ret i32 %result
124}
125
126; CHECK-LABEL: PR12375
127; CHECK: -->  {(4 + %arg),+,4}<nuw><%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (8 + %arg)<nsw>
128define i32 @PR12375(i32* readnone %arg) {
129bb:
130  %tmp = getelementptr inbounds i32, i32* %arg, i64 2
131  br label %bb1
132
133bb1:                                              ; preds = %bb1, %bb
134  %tmp2 = phi i32* [ %arg, %bb ], [ %tmp5, %bb1 ]
135  %tmp3 = phi i32 [ 0, %bb ], [ %tmp4, %bb1 ]
136  %tmp4 = add nsw i32 %tmp3, 1
137  %tmp5 = getelementptr inbounds i32, i32* %tmp2, i64 1
138  %tmp6 = icmp ult i32* %tmp5, %tmp
139  br i1 %tmp6, label %bb1, label %bb7
140
141bb7:                                              ; preds = %bb1
142  ret i32 %tmp4
143}
144
145; CHECK-LABEL: PR12376
146; CHECK: -->  {(4 + %arg),+,4}<nuw><%bb2>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (4 + (4 * ((3 + (-1 * %arg) + (%arg umax %arg1)) /u 4)) + %arg)
147define void @PR12376(i32* nocapture %arg, i32* nocapture %arg1)  {
148bb:
149  br label %bb2
150
151bb2:                                              ; preds = %bb2, %bb
152  %tmp = phi i32* [ %arg, %bb ], [ %tmp4, %bb2 ]
153  %tmp3 = icmp ult i32* %tmp, %arg1
154  %tmp4 = getelementptr inbounds i32, i32* %tmp, i64 1
155  br i1 %tmp3, label %bb2, label %bb5
156
157bb5:                                              ; preds = %bb2
158  ret void
159}
160
161declare void @f(i32)
162
163; CHECK-LABEL: nswnowrap
164; CHECK: --> {(1 + %v),+,1}<nsw><%for.body>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: (2 + %v)
165define void @nswnowrap(i32 %v) {
166entry:
167  %add = add nsw i32 %v, 1
168  br label %for.body
169
170for.body:
171  %i.04 = phi i32 [ %v, %entry ], [ %inc, %for.body ]
172  %inc = add nsw i32 %i.04, 1
173  tail call void @f(i32 %i.04)
174  %cmp = icmp slt i32 %i.04, %add
175  br i1 %cmp, label %for.body, label %for.end
176
177for.end:
178  ret void
179}
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