source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/arm64-code-model-large-abs.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.1 KB
Line 
1; RUN: llc -mtriple=arm64-none-linux-gnu -code-model=large < %s | FileCheck %s
2
3@var8 = global i8 0
4@var16 = global i16 0
5@var32 = global i32 0
6@var64 = global i64 0
7
8define i8* @global_addr() {
9; CHECK-LABEL: global_addr:
10  ret i8* @var8
11  ; The movz/movk calculation should end up returned directly in x0.
12; CHECK: movz x0, #:abs_g3:var8
13; CHECK: movk x0, #:abs_g2_nc:var8
14; CHECK: movk x0, #:abs_g1_nc:var8
15; CHECK: movk x0, #:abs_g0_nc:var8
16; CHECK-NEXT: ret
17}
18
19define i8 @global_i8() {
20; CHECK-LABEL: global_i8:
21  %val = load i8, i8* @var8
22  ret i8 %val
23; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8
24; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8
25; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var8
26; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var8
27; CHECK: ldrb w0, [x[[ADDR_REG]]]
28}
29
30define i16 @global_i16() {
31; CHECK-LABEL: global_i16:
32  %val = load i16, i16* @var16
33  ret i16 %val
34; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16
35; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
36; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16
37; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var16
38; CHECK: ldrh w0, [x[[ADDR_REG]]]
39}
40
41define i32 @global_i32() {
42; CHECK-LABEL: global_i32:
43  %val = load i32, i32* @var32
44  ret i32 %val
45; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32
46; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var32
47; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var32
48; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var32
49; CHECK: ldr w0, [x[[ADDR_REG]]]
50}
51
52define i64 @global_i64() {
53; CHECK-LABEL: global_i64:
54  %val = load i64, i64* @var64
55  ret i64 %val
56; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64
57; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var64
58; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var64
59; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var64
60; CHECK: ldr x0, [x[[ADDR_REG]]]
61}
62
63define <2 x i64> @constpool() {
64; CHECK-LABEL: constpool:
65  ret <2 x i64> <i64 123456789, i64 987654321100>
66
67; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:[[CPADDR:.LCPI[0-9]+_[0-9]+]]
68; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:[[CPADDR]]
69; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:[[CPADDR]]
70; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:[[CPADDR]]
71; CHECK: ldr q0, [x[[ADDR_REG]]]
72}
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