source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/arm64-long-shift.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.4 KB
Line 
1; RUN: llc < %s -march=arm64 -mcpu=cyclone | FileCheck %s
2
3define i128 @shl(i128 %r, i128 %s) nounwind readnone {
4; CHECK-LABEL: shl:
5; CHECK: orr w[[SIXTY_FOUR:[0-9]+]], wzr, #0x40
6; CHECK: sub [[REV_SHIFT:x[0-9]+]], x[[SIXTY_FOUR]], x2
7; CHECK: lsr  [[LO_FOR_HI_NORMAL:x[0-9]+]], x0, [[REV_SHIFT]]
8; CHECK: cmp x2, #0
9; CHECK: csel [[LO_FOR_HI:x[0-9]+]], xzr, [[LO_FOR_HI_NORMAL]], eq
10; CHECK: lsl  [[HI_FOR_HI:x[0-9]+]], x1, x2
11; CHECK: orr [[HI_NORMAL:x[0-9]+]], [[LO_FOR_HI]], [[HI_FOR_HI]]
12; CHECK: sub [[EXTRA_SHIFT:x[0-9]+]], x2, #64
13; CHECK: lsl  [[HI_BIG_SHIFT:x[0-9]+]], x0, [[EXTRA_SHIFT]]
14; CHECK: cmp   [[EXTRA_SHIFT]], #0
15; CHECK: csel  x1, [[HI_BIG_SHIFT]], [[HI_NORMAL]], ge
16; CHECK: lsl  [[SMALLSHIFT_LO:x[0-9]+]], x0, x2
17; CHECK: csel  x0, xzr, [[SMALLSHIFT_LO]], ge
18; CHECK: ret
19
20  %shl = shl i128 %r, %s
21  ret i128 %shl
22}
23
24define i128 @ashr(i128 %r, i128 %s) nounwind readnone {
25; CHECK-LABEL: ashr:
26; CHECK: orr w[[SIXTY_FOUR:[0-9]+]], wzr, #0x40
27; CHECK: sub [[REV_SHIFT:x[0-9]+]], x[[SIXTY_FOUR]], x2
28; CHECK: lsl  [[HI_FOR_LO_NORMAL:x[0-9]+]], x1, [[REV_SHIFT]]
29; CHECK: cmp x2, #0
30; CHECK: csel [[HI_FOR_LO:x[0-9]+]], xzr, [[HI_FOR_LO_NORMAL]], eq
31; CHECK: lsr  [[LO_FOR_LO:x[0-9]+]], x0, x2
32; CHECK: orr [[LO_NORMAL:x[0-9]+]], [[LO_FOR_LO]], [[HI_FOR_LO]]
33; CHECK: sub [[EXTRA_SHIFT:x[0-9]+]], x2, #64
34; CHECK: asr  [[LO_BIG_SHIFT:x[0-9]+]], x1, [[EXTRA_SHIFT]]
35; CHECK: cmp   [[EXTRA_SHIFT]], #0
36; CHECK: csel  x0, [[LO_BIG_SHIFT]], [[LO_NORMAL]], ge
37; CHECK: asr  [[SMALLSHIFT_HI:x[0-9]+]], x1, x2
38; CHECK: asr [[BIGSHIFT_HI:x[0-9]+]], x1, #63
39; CHECK: csel x1, [[BIGSHIFT_HI]], [[SMALLSHIFT_HI]], ge
40; CHECK: ret
41
42  %shr = ashr i128 %r, %s
43  ret i128 %shr
44}
45
46define i128 @lshr(i128 %r, i128 %s) nounwind readnone {
47; CHECK-LABEL: lshr:
48; CHECK: orr w[[SIXTY_FOUR:[0-9]+]], wzr, #0x40
49; CHECK: sub [[REV_SHIFT:x[0-9]+]], x[[SIXTY_FOUR]], x2
50; CHECK: lsl  [[HI_FOR_LO_NORMAL:x[0-9]+]], x1, [[REV_SHIFT]]
51; CHECK: cmp x2, #0
52; CHECK: csel [[HI_FOR_LO:x[0-9]+]], xzr, [[HI_FOR_LO_NORMAL]], eq
53; CHECK: lsr  [[LO_FOR_LO:x[0-9]+]], x0, x2
54; CHECK: orr [[LO_NORMAL:x[0-9]+]], [[LO_FOR_LO]], [[HI_FOR_LO]]
55; CHECK: sub [[EXTRA_SHIFT:x[0-9]+]], x2, #64
56; CHECK: lsr  [[LO_BIG_SHIFT:x[0-9]+]], x1, [[EXTRA_SHIFT]]
57; CHECK: cmp   [[EXTRA_SHIFT]], #0
58; CHECK: csel  x0, [[LO_BIG_SHIFT]], [[LO_NORMAL]], ge
59; CHECK: lsr  [[SMALLSHIFT_HI:x[0-9]+]], x1, x2
60; CHECK: csel x1, xzr, [[SMALLSHIFT_HI]], ge
61; CHECK: ret
62
63  %shr = lshr i128 %r, %s
64  ret i128 %shr
65}
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