source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/arm64-popcnt.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.2 KB
Line 
1; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
2; RUN: llc < %s -march=aarch64 -mattr -neon -aarch64-neon-syntax=apple | FileCheck -check-prefix=CHECK-NONEON %s
3
4define i32 @cnt32_advsimd(i32 %x) nounwind readnone {
5  %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
6  ret i32 %cnt
7; CHECK: mov w[[IN64:[0-9]+]], w0
8; CHECK: fmov   d0, x[[IN64]]
9; CHECK: cnt.8b v0, v0
10; CHECK: uaddlv.8b      h0, v0
11; CHECK: fmov w0, s0
12; CHECK: ret
13; CHECK-NONEON-LABEL: cnt32_advsimd
14; CHECK-NONEON-NOT: 8b
15; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x55555555
16; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x33333333
17; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0xf0f0f0f
18; CHECK-NONEON: mul
19}
20
21define i32 @cnt32_advsimd_2(<2 x i32> %x) {
22  %1 = extractelement <2 x i32> %x, i64 0
23  %2 = tail call i32 @llvm.ctpop.i32(i32 %1)
24  ret i32 %2
25; CHECK: fmov   w0, s0
26; CHECK: fmov   d0, x0
27; CHECK: cnt.8b v0, v0
28; CHECK: uaddlv.8b      h0, v0
29; CHECK: fmov w0, s0
30; CHECK: ret
31; CHECK-NONEON-LABEL: cnt32_advsimd_2
32; CHECK-NONEON-NOT: 8b
33; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x55555555
34; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0x33333333
35; CHECK-NONEON: and w{{[0-9]+}}, w{{[0-9]+}}, #0xf0f0f0f
36; CHECK-NONEON: mul
37}
38
39define i64 @cnt64_advsimd(i64 %x) nounwind readnone {
40  %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
41  ret i64 %cnt
42; CHECK: fmov   d0, x0
43; CHECK: cnt.8b v0, v0
44; CHECK: uaddlv.8b      h0, v0
45; CHECK: fmov   w0, s0
46; CHECK: ret
47; CHECK-NONEON-LABEL: cnt64_advsimd
48; CHECK-NONEON-NOT: 8b
49; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x5555555555555555
50; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0x3333333333333333
51; CHECK-NONEON: and x{{[0-9]+}}, x{{[0-9]+}}, #0xf0f0f0f0f0f0f0f
52; CHECK-NONEON: mul
53}
54
55; Do not use AdvSIMD when -mno-implicit-float is specified.
56; rdar://9473858
57
58define i32 @cnt32(i32 %x) nounwind readnone noimplicitfloat {
59  %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
60  ret i32 %cnt
61; CHECK-LABEL: cnt32:
62; CHECK-NOT: 16b
63; CHECK: ret
64}
65
66define i64 @cnt64(i64 %x) nounwind readnone noimplicitfloat {
67  %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
68  ret i64 %cnt
69; CHECK-LABEL: cnt64:
70; CHECK-NOT: 16b
71; CHECK: ret
72}
73
74declare i32 @llvm.ctpop.i32(i32) nounwind readnone
75declare i64 @llvm.ctpop.i64(i64) nounwind readnone
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