source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/arm64-trunc-store.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.5 KB
Line 
1; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-post-ra | FileCheck %s
2
3define void @bar(<8 x i16> %arg, <8 x i8>* %p) nounwind {
4; CHECK-LABEL: bar:
5; CHECK: xtn.8b v[[REG:[0-9]+]], v0
6; CHECK-NEXT: str d[[REG]], [x0]
7; CHECK-NEXT: ret
8  %tmp = trunc <8 x i16> %arg to <8 x i8>
9  store <8 x i8> %tmp, <8 x i8>* %p, align 8
10  ret void
11}
12
13@zptr8 = common global i8* null, align 8
14@zptr16 = common global i16* null, align 8
15@zptr32 = common global i32* null, align 8
16
17define void @fct32(i32 %arg, i64 %var) {
18; CHECK: fct32
19; CHECK: adrp [[GLOBALPAGE:x[0-9]+]], _zptr32@GOTPAGE
20; CHECK: ldr [[GLOBALOFF:x[0-9]+]], {{\[}}[[GLOBALPAGE]], _zptr32@GOTPAGEOFF]
21; CHECK: ldr [[GLOBALADDR:x[0-9]+]], {{\[}}[[GLOBALOFF]]]
22; w0 is %arg
23; CHECK-NEXT: sub w[[OFFSETREGNUM:[0-9]+]], w0, #1
24; w1 is %var truncated
25; CHECK-NEXT: str w1, {{\[}}[[GLOBALADDR]], w[[OFFSETREGNUM]], sxtw #2]
26; CHECK-NEXT: ret
27bb:
28  %.pre37 = load i32*, i32** @zptr32, align 8
29  %dec = add nsw i32 %arg, -1
30  %idxprom8 = sext i32 %dec to i64
31  %arrayidx9 = getelementptr inbounds i32, i32* %.pre37, i64 %idxprom8
32  %tmp = trunc i64 %var to i32
33  store i32 %tmp, i32* %arrayidx9, align 4
34  ret void
35}
36
37define void @fct16(i32 %arg, i64 %var) {
38; CHECK: fct16
39; CHECK: adrp [[GLOBALPAGE:x[0-9]+]], _zptr16@GOTPAGE
40; CHECK: ldr [[GLOBALOFF:x[0-9]+]], {{\[}}[[GLOBALPAGE]], _zptr16@GOTPAGEOFF]
41; CHECK: ldr [[GLOBALADDR:x[0-9]+]], {{\[}}[[GLOBALOFF]]]
42; w0 is %arg
43; CHECK-NEXT: sub w[[OFFSETREGNUM:[0-9]+]], w0, #1
44; w1 is %var truncated
45; CHECK-NEXT: strh w1, {{\[}}[[GLOBALADDR]], w[[OFFSETREGNUM]], sxtw #1]
46; CHECK-NEXT: ret
47bb:
48  %.pre37 = load i16*, i16** @zptr16, align 8
49  %dec = add nsw i32 %arg, -1
50  %idxprom8 = sext i32 %dec to i64
51  %arrayidx9 = getelementptr inbounds i16, i16* %.pre37, i64 %idxprom8
52  %tmp = trunc i64 %var to i16
53  store i16 %tmp, i16* %arrayidx9, align 4
54  ret void
55}
56
57define void @fct8(i32 %arg, i64 %var) {
58; CHECK: fct8
59; CHECK: adrp [[GLOBALPAGE:x[0-9]+]], _zptr8@GOTPAGE
60; CHECK: ldr [[GLOBALOFF:x[0-9]+]], {{\[}}[[GLOBALPAGE]], _zptr8@GOTPAGEOFF]
61; CHECK: ldr [[BASEADDR:x[0-9]+]], {{\[}}[[GLOBALOFF]]]
62; w0 is %arg
63; CHECK-NEXT: add [[ADDR:x[0-9]+]], [[BASEADDR]], w0, sxtw
64; w1 is %var truncated
65; CHECK-NEXT: sturb w1, {{\[}}[[ADDR]], #-1]
66; CHECK-NEXT: ret
67bb:
68  %.pre37 = load i8*, i8** @zptr8, align 8
69  %dec = add nsw i32 %arg, -1
70  %idxprom8 = sext i32 %dec to i64
71  %arrayidx9 = getelementptr inbounds i8, i8* %.pre37, i64 %idxprom8
72  %tmp = trunc i64 %var to i8
73  store i8 %tmp, i8* %arrayidx9, align 4
74  ret void
75}
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