source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/free-zext.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.2 KB
Line 
1; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
2
3define i64 @test_free_zext(i8* %a, i16* %b) {
4; CHECK-LABEL: test_free_zext:
5; CHECK-DAG: ldrb w[[A:[0-9]+]], [x0]
6; CHECK: ldrh w[[B:[0-9]+]], [x1]
7; CHECK: add x0, x[[B]], x[[A]]
8  %1 = load i8, i8* %a, align 1
9  %conv = zext i8 %1 to i64
10  %2 = load i16, i16* %b, align 2
11  %conv1 = zext i16 %2 to i64
12  %add = add nsw i64 %conv1, %conv
13  ret i64 %add
14}
15
16define void @test_free_zext2(i32* %ptr, i32* %dst1, i64* %dst2) {
17; CHECK-LABEL: test_free_zext2:
18; CHECK: ldrh w[[A:[0-9]+]], [x0]
19; CHECK-NOT: and x
20; CHECK: str w[[A]], [x1]
21; CHECK: str x[[A]], [x2]
22  %load = load i32, i32* %ptr, align 8
23  %load16 = and i32 %load, 65535
24  %load64 = zext i32 %load16 to i64
25  store i32 %load16, i32* %dst1, align 4
26  store i64 %load64, i64* %dst2, align 8
27  ret void
28}
29
30; Test for CodeGenPrepare::optimizeLoadExt(): simple case: two loads
31; feeding a phi that zext's each loaded value.
32define i32 @test_free_zext3(i32* %ptr, i32* %ptr2, i32* %dst, i32 %c) {
33; CHECK-LABEL: test_free_zext3:
34bb1:
35; CHECK: ldrh [[REG:w[0-9]+]]
36; CHECK-NOT: and {{w[0-9]+}}, [[REG]], #0xffff
37  %tmp1 = load i32, i32* %ptr, align 4
38  %cmp = icmp ne i32 %c, 0
39  br i1 %cmp, label %bb2, label %bb3
40bb2:
41; CHECK: ldrh [[REG2:w[0-9]+]]
42; CHECK-NOT: and {{w[0-9]+}}, [[REG2]], #0xffff
43  %tmp2 = load i32, i32* %ptr2, align 4
44  br label %bb3
45bb3:
46  %tmp3 = phi i32 [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
47; CHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xffff
48  %tmpand = and i32 %tmp3, 65535
49  ret i32 %tmpand
50}
51
52; Test for CodeGenPrepare::optimizeLoadExt(): check case of zext-able
53; load feeding a phi in the same block.
54define void @test_free_zext4(i32* %ptr, i32* %ptr2, i32* %dst) {
55; CHECK-LABEL: test_free_zext4:
56; CHECK: ldrh [[REG:w[0-9]+]]
57; TODO: fix isel to remove final and XCHECK-NOT: and {{w[0-9]+}}, {{w[0-9]+}}, #0xffff
58; CHECK: ldrh [[REG:w[0-9]+]]
59bb1:
60  %load1 = load i32, i32* %ptr, align 4
61  br label %loop
62loop:
63  %phi = phi i32 [ %load1, %bb1 ], [ %load2, %loop ]
64  %and = and i32 %phi, 65535
65  store i32 %and, i32* %dst, align 4
66  %load2 = load i32, i32* %ptr2, align 4
67  %cmp = icmp ne i32 %and, 0
68  br i1 %cmp, label %loop, label %end
69end:
70  ret void
71}
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