source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/func-argpassing.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -disable-post-ra | FileCheck --check-prefix=CHECK %s
2; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -disable-post-ra | FileCheck --check-prefix=CHECK-NOFP %s
3
4%myStruct = type { i64 , i8, i32 }
5
6@var8 = global i8 0
7@var32 = global i32 0
8@var64 = global i64 0
9@var128 = global i128 0
10@varfloat = global float 0.0
11@vardouble = global double 0.0
12@varstruct = global %myStruct zeroinitializer
13
14define void @take_i8s(i8 %val1, i8 %val2) {
15; CHECK-LABEL: take_i8s:
16    store i8 %val2, i8* @var8
17    ; Not using w1 may be technically allowed, but it would indicate a
18    ; problem in itself.
19;  CHECK: strb w1, [{{x[0-9]+}}, {{#?}}:lo12:var8]
20    ret void
21}
22
23define void @add_floats(float %val1, float %val2) {
24; CHECK-LABEL: add_floats:
25    %newval = fadd float %val1, %val2
26; CHECK: fadd [[ADDRES:s[0-9]+]], s0, s1
27; CHECK-NOFP-NOT: fadd
28    store float %newval, float* @varfloat
29; CHECK: str [[ADDRES]], [{{x[0-9]+}}, {{#?}}:lo12:varfloat]
30    ret void
31}
32
33; byval pointers should be allocated to the stack and copied as if
34; with memcpy.
35define void @take_struct(%myStruct* byval %structval) {
36; CHECK-LABEL: take_struct:
37    %addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2
38    %addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0
39
40    %val0 = load volatile i32, i32* %addr0
41    ; Some weird move means x0 is used for one access
42; CHECK: ldr [[REG32:w[0-9]+]], [{{x[0-9]+|sp}}, #12]
43    store volatile i32 %val0, i32* @var32
44; CHECK: str [[REG32]], [{{x[0-9]+}}, {{#?}}:lo12:var32]
45
46    %val1 = load volatile i64, i64* %addr1
47; CHECK: ldr [[REG64:x[0-9]+]], [{{x[0-9]+|sp}}]
48    store volatile i64 %val1, i64* @var64
49; CHECK: str [[REG64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
50
51    ret void
52}
53
54; %structval should be at sp + 16
55define void @check_byval_align(i32* byval %ignore, %myStruct* byval align 16 %structval) {
56; CHECK-LABEL: check_byval_align:
57
58    %addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2
59    %addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0
60
61    %val0 = load volatile i32, i32* %addr0
62    ; Some weird move means x0 is used for one access
63; CHECK: ldr [[REG32:w[0-9]+]], [sp, #28]
64    store i32 %val0, i32* @var32
65; CHECK: str [[REG32]], [{{x[0-9]+}}, {{#?}}:lo12:var32]
66
67    %val1 = load volatile i64, i64* %addr1
68; CHECK: ldr [[REG64:x[0-9]+]], [sp, #16]
69    store i64 %val1, i64* @var64
70; CHECK: str [[REG64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
71
72    ret void
73}
74
75define i32 @return_int() {
76; CHECK-LABEL: return_int:
77    %val = load i32, i32* @var32
78    ret i32 %val
79; CHECK: ldr w0, [{{x[0-9]+}}, {{#?}}:lo12:var32]
80    ; Make sure epilogue follows
81; CHECK-NEXT: ret
82}
83
84define double @return_double() {
85; CHECK-LABEL: return_double:
86    ret double 3.14
87; CHECK: ldr d0, [{{x[0-9]+}}, {{#?}}:lo12:.LCPI
88; CHECK-NOFP-NOT: ldr d0,
89}
90
91; This is the kind of IR clang will produce for returning a struct
92; small enough to go into registers. Not all that pretty, but it
93; works.
94define [2 x i64] @return_struct() {
95; CHECK-LABEL: return_struct:
96    %addr = bitcast %myStruct* @varstruct to [2 x i64]*
97    %val = load [2 x i64], [2 x i64]* %addr
98    ret [2 x i64] %val
99; CHECK: add x[[VARSTRUCT:[0-9]+]], {{x[0-9]+}}, :lo12:varstruct
100; CHECK: ldp x0, x1, [x[[VARSTRUCT]]]
101    ; Make sure epilogue immediately follows
102; CHECK-NEXT: ret
103}
104
105; Large structs are passed by reference (storage allocated by caller
106; to preserve value semantics) in x8. Strictly this only applies to
107; structs larger than 16 bytes, but C semantics can still be provided
108; if LLVM does it to %myStruct too. So this is the simplest check
109define void @return_large_struct(%myStruct* sret %retval) {
110; CHECK-LABEL: return_large_struct:
111    %addr0 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 0
112    %addr1 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 1
113    %addr2 = getelementptr %myStruct, %myStruct* %retval, i64 0, i32 2
114
115    store i64 42, i64* %addr0
116    store i8 2, i8* %addr1
117    store i32 9, i32* %addr2
118; CHECK: str {{x[0-9]+}}, [x8]
119; CHECK: strb {{w[0-9]+}}, [x8, #8]
120; CHECK: str {{w[0-9]+}}, [x8, #12]
121
122    ret void
123}
124
125; This struct is just too far along to go into registers: (only x7 is
126; available, but it needs two). Also make sure that %stacked doesn't
127; sneak into x7 behind.
128define i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
129                          i32* %var6, %myStruct* byval %struct, i32* byval %stacked,
130                          double %notstacked) {
131; CHECK-LABEL: struct_on_stack:
132    %addr = getelementptr %myStruct, %myStruct* %struct, i64 0, i32 0
133    %val64 = load volatile i64, i64* %addr
134    store volatile i64 %val64, i64* @var64
135    ; Currently nothing on local stack, so struct should be at sp
136; CHECK: ldr [[VAL64:x[0-9]+]], [sp]
137; CHECK: str [[VAL64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
138
139    store volatile double %notstacked, double* @vardouble
140; CHECK-NOT: ldr d0
141; CHECK: str d0, [{{x[0-9]+}}, {{#?}}:lo12:vardouble
142; CHECK-NOFP-NOT: str d0,
143
144    %retval = load volatile i32, i32* %stacked
145    ret i32 %retval
146; CHECK-LE: ldr w0, [sp, #16]
147}
148
149define void @stacked_fpu(float %var0, double %var1, float %var2, float %var3,
150                         float %var4, float %var5, float %var6, float %var7,
151                         float %var8) {
152; CHECK-LABEL: stacked_fpu:
153    store float %var8, float* @varfloat
154    ; Beware as above: the offset would be different on big-endian
155    ; machines if the first ldr were changed to use s-registers.
156; CHECK: ldr {{[ds]}}[[VALFLOAT:[0-9]+]], [sp]
157; CHECK: str s[[VALFLOAT]], [{{x[0-9]+}}, {{#?}}:lo12:varfloat]
158
159    ret void
160}
161
162; 128-bit integer types should be passed in xEVEN, xODD rather than
163; the reverse. In this case x2 and x3. Nothing should use x1.
164define i64 @check_i128_regalign(i32 %val0, i128 %val1, i64 %val2) {
165; CHECK-LABEL: check_i128_regalign
166    store i128 %val1, i128* @var128
167; CHECK: add x[[VAR128:[0-9]+]], {{x[0-9]+}}, :lo12:var128
168; CHECK-DAG: stp x2, x3, [x[[VAR128]]]
169
170    ret i64 %val2
171; CHECK: mov x0, x4
172}
173
174define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
175                                   i32 %val4, i32 %val5, i32 %val6, i32 %val7,
176                                   i32 %stack1, i128 %stack2) {
177; CHECK-LABEL: check_i128_stackalign
178    store i128 %stack2, i128* @var128
179    ; Nothing local on stack in current codegen, so first stack is 16 away
180; CHECK-LE: add     x[[REG:[0-9]+]], sp, #16
181; CHECK-LE: ldr {{x[0-9]+}}, [x[[REG]], #8]
182
183    ; Important point is that we address sp+24 for second dword
184
185; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [sp, #16]
186    ret void
187}
188
189declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
190
191define i32 @test_extern() {
192; CHECK-LABEL: test_extern:
193  call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 undef, i32 4, i1 0)
194; CHECK: bl memcpy
195  ret i32 0
196}
197
198
199; A sub-i32 stack argument must be loaded on big endian with ldr{h,b}, not just
200; implicitly extended to a 32-bit load.
201define i16 @stacked_i16(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
202                        i32 %val4, i32 %val5, i32 %val6, i32 %val7,
203                        i16 %stack1) {
204; CHECK-LABEL: stacked_i16
205  ret i16 %stack1
206}
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