1 | ; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s |
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2 | %big = type i32 |
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3 | |
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4 | @var = global %big 0 |
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5 | |
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6 | ; AAPCS: low 8 bits of %in (== w0) will be either 0 or 1. Need to extend to |
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7 | ; 32-bits. |
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8 | define void @consume_i1_arg(i1 %in) { |
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9 | ; CHECK-LABEL: consume_i1_arg: |
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10 | ; CHECK: and [[BOOL32:w[0-9]+]], w0, #{{0x1|0xff}} |
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11 | ; CHECK: str [[BOOL32]], [{{x[0-9]+}}, :lo12:var] |
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12 | %val = zext i1 %in to %big |
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13 | store %big %val, %big* @var |
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14 | ret void |
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15 | } |
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16 | |
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17 | ; AAPCS: low 8 bits of %val1 (== w0) will be either 0 or 1. Need to extend to |
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18 | ; 32-bits (doesn't really matter if it's from 1 or 8 bits). |
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19 | define void @consume_i1_ret() { |
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20 | ; CHECK-LABEL: consume_i1_ret: |
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21 | ; CHECK: bl produce_i1_ret |
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22 | ; CHECK: and [[BOOL32:w[0-9]+]], w0, #{{0x1|0xff}} |
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23 | ; CHECK: str [[BOOL32]], [{{x[0-9]+}}, :lo12:var] |
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24 | %val1 = call i1 @produce_i1_ret() |
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25 | %val = zext i1 %val1 to %big |
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26 | store %big %val, %big* @var |
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27 | ret void |
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28 | } |
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29 | |
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30 | ; AAPCS: low 8 bits of w0 must be either 0 or 1. Need to mask them off. |
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31 | define i1 @produce_i1_ret() { |
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32 | ; CHECK-LABEL: produce_i1_ret: |
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33 | ; CHECK: ldr [[VAR32:w[0-9]+]], [{{x[0-9]+}}, :lo12:var] |
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34 | ; CHECK: and w0, [[VAR32]], #{{0x1|0xff}} |
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35 | %val = load %big, %big* @var |
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36 | %val1 = trunc %big %val to i1 |
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37 | ret i1 %val1 |
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38 | } |
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39 | |
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40 | define void @produce_i1_arg() { |
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41 | ; CHECK-LABEL: produce_i1_arg: |
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42 | ; CHECK: ldr [[VAR32:w[0-9]+]], [{{x[0-9]+}}, :lo12:var] |
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43 | ; CHECK: and w0, [[VAR32]], #{{0x1|0xff}} |
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44 | ; CHECK: bl consume_i1_arg |
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45 | %val = load %big, %big* @var |
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46 | %val1 = trunc %big %val to i1 |
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47 | call void @consume_i1_arg(i1 %val1) |
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48 | ret void |
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49 | } |
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50 | |
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51 | |
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52 | ;define zeroext i1 @foo(i8 %in) { |
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53 | ; %val = trunc i8 %in to i1 |
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54 | ; ret i1 %val |
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55 | ;} |
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