source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/madd-combiner.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 1.0 KB
Line 
1; RUN: llc -mtriple=aarch64-apple-darwin            -verify-machineinstrs < %s | FileCheck %s
2; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s | FileCheck %s
3
4; Test that we use the correct register class.
5define i32 @mul_add_imm(i32 %a, i32 %b) {
6; CHECK-LABEL: mul_add_imm
7; CHECK:       orr [[REG:w[0-9]+]], wzr, #0x4
8; CHECK-NEXT:  madd  {{w[0-9]+}}, w0, w1, [[REG]]
9  %1 = mul i32 %a, %b
10  %2 = add i32 %1, 4
11  ret i32 %2
12}
13
14define i32 @mul_sub_imm1(i32 %a, i32 %b) {
15; CHECK-LABEL: mul_sub_imm1
16; CHECK:       orr [[REG:w[0-9]+]], wzr, #0x4
17; CHECK-NEXT:  msub  {{w[0-9]+}}, w0, w1, [[REG]]
18  %1 = mul i32 %a, %b
19  %2 = sub i32 4, %1
20  ret i32 %2
21}
22
23; bugpoint reduced test case. This only tests that we pass the MI verifier.
24define void @mul_add_imm2() {
25entry:
26  br label %for.body
27for.body:
28  br i1 undef, label %for.body, label %for.body8
29for.body8:
30  %0 = mul i64 undef, -3
31  %mul1971 = add i64 %0, -3
32  %cmp7 = icmp slt i64 %mul1971, 1390451930000
33  br i1 %cmp7, label %for.body8, label %for.end20
34for.end20:
35  ret void
36}
37
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