source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AArch64/minmax.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.7 KB
Line 
1; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
2
3; CHECK-LABEL: t1
4; CHECK: smax
5define <4 x i32> @t1(<4 x i32> %a, <4 x i32> %b) {
6  %t1 = icmp sgt <4 x i32> %a, %b
7  %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
8  ret <4 x i32> %t2
9}
10
11; CHECK-LABEL: t2
12; CHECK: smin
13define <4 x i32> @t2(<4 x i32> %a, <4 x i32> %b) {
14  %t1 = icmp slt <4 x i32> %a, %b
15  %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
16  ret <4 x i32> %t2
17}
18
19; CHECK-LABEL: t3
20; CHECK: umax
21define <4 x i32> @t3(<4 x i32> %a, <4 x i32> %b) {
22  %t1 = icmp ugt <4 x i32> %a, %b
23  %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
24  ret <4 x i32> %t2
25}
26
27; CHECK-LABEL: t4
28; CHECK: umin
29define <8 x i8> @t4(<8 x i8> %a, <8 x i8> %b) {
30  %t1 = icmp ult <8 x i8> %a, %b
31  %t2 = select <8 x i1> %t1, <8 x i8> %a, <8 x i8> %b
32  ret <8 x i8> %t2
33}
34
35; CHECK-LABEL: t5
36; CHECK: smin
37define <4 x i16> @t5(<4 x i16> %a, <4 x i16> %b) {
38  %t1 = icmp sgt <4 x i16> %b, %a
39  %t2 = select <4 x i1> %t1, <4 x i16> %a, <4 x i16> %b
40  ret <4 x i16> %t2
41}
42
43; CHECK-LABEL: t6
44; CHECK: smax
45define <2 x i32> @t6(<2 x i32> %a, <2 x i32> %b) {
46  %t1 = icmp slt <2 x i32> %b, %a
47  %t2 = select <2 x i1> %t1, <2 x i32> %a, <2 x i32> %b
48  ret <2 x i32> %t2
49}
50
51; CHECK-LABEL: t7
52; CHECK: umin
53define <16 x i8> @t7(<16 x i8> %a, <16 x i8> %b) {
54  %t1 = icmp ugt <16 x i8> %b, %a
55  %t2 = select <16 x i1> %t1, <16 x i8> %a, <16 x i8> %b
56  ret <16 x i8> %t2
57}
58
59; CHECK-LABEL: t8
60; CHECK: umax
61define <8 x i16> @t8(<8 x i16> %a, <8 x i16> %b) {
62  %t1 = icmp ult <8 x i16> %b, %a
63  %t2 = select <8 x i1> %t1, <8 x i16> %a, <8 x i16> %b
64  ret <8 x i16> %t2
65}
66
67; CHECK-LABEL: t9
68; CHECK: umin
69; CHECK: smax
70define <4 x i32> @t9(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
71  %t1 = icmp ugt <4 x i32> %b, %a
72  %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
73  %t3 = icmp sge <4 x i32> %t2, %c
74  %t4 = select <4 x i1> %t3, <4 x i32> %t2, <4 x i32> %c
75  ret <4 x i32> %t4
76}
77
78; CHECK-LABEL: t10
79; CHECK: smax
80; CHECK: smax
81define <8 x i32> @t10(<8 x i32> %a, <8 x i32> %b) {
82  %t1 = icmp sgt <8 x i32> %a, %b
83  %t2 = select <8 x i1> %t1, <8 x i32> %a, <8 x i32> %b
84  ret <8 x i32> %t2
85}
86
87; CHECK-LABEL: t11
88; CHECK: smin
89; CHECK: smin
90; CHECK: smin
91; CHECK: smin
92define <16 x i32> @t11(<16 x i32> %a, <16 x i32> %b) {
93  %t1 = icmp sle <16 x i32> %a, %b
94  %t2 = select <16 x i1> %t1, <16 x i32> %a, <16 x i32> %b
95  ret <16 x i32> %t2
96}
97
98; CHECK-LABEL: t12
99; CHECK-NOT: umin
100; The icmp is used by two instructions, so don't produce a umin node.
101define <16 x i8> @t12(<16 x i8> %a, <16 x i8> %b) {
102  %t1 = icmp ugt <16 x i8> %b, %a
103  %t2 = select <16 x i1> %t1, <16 x i8> %a, <16 x i8> %b
104  %t3 = zext <16 x i1> %t1 to <16 x i8>
105  %t4 = add <16 x i8> %t3, %t2
106  ret <16 x i8> %t4
107}
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