source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 3.0 KB
Line 
1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=SI -enable-no-nans-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-NONAN -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
4
5declare float @llvm.fabs.f32(float) #1
6declare float @llvm.floor.f32(float) #1
7
8; FUNC-LABEL: {{^}}cvt_rpi_i32_f32:
9; SI-SAFE-NOT: v_cvt_rpi_i32_f32
10; SI-NONAN: v_cvt_rpi_i32_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}
11; SI: s_endpgm
12define void @cvt_rpi_i32_f32(i32 addrspace(1)* %out, float %x) #0 {
13  %fadd = fadd float %x, 0.5
14  %floor = call float @llvm.floor.f32(float %fadd) #1
15  %cvt = fptosi float %floor to i32
16  store i32 %cvt, i32 addrspace(1)* %out
17  ret void
18}
19
20; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fabs:
21; SI-SAFE-NOT: v_cvt_rpi_i32_f32
22; SI-NONAN: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|{{$}}
23; SI: s_endpgm
24define void @cvt_rpi_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 {
25  %x.fabs = call float @llvm.fabs.f32(float %x) #1
26  %fadd = fadd float %x.fabs, 0.5
27  %floor = call float @llvm.floor.f32(float %fadd) #1
28  %cvt = fptosi float %floor to i32
29  store i32 %cvt, i32 addrspace(1)* %out
30  ret void
31}
32
33; FIXME: This doesn't work because it forms fsub 0.5, x
34; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fneg:
35; XSI-NONAN: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, -s{{[0-9]+}}
36; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, s{{[0-9]+}}
37; SI-SAFE-NOT: v_cvt_flr_i32_f32
38; SI-NONAN: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]]
39; SI: s_endpgm
40define void @cvt_rpi_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 {
41  %x.fneg = fsub float -0.000000e+00, %x
42  %fadd = fadd float %x.fneg, 0.5
43  %floor = call float @llvm.floor.f32(float %fadd) #1
44  %cvt = fptosi float %floor to i32
45  store i32 %cvt, i32 addrspace(1)* %out
46  ret void
47}
48
49; FIXME: This doesn't work for same reason as above
50; FUNC-LABEL: {{^}}cvt_rpi_i32_f32_fabs_fneg:
51; SI-SAFE-NOT: v_cvt_rpi_i32_f32
52; XSI-NONAN: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, -|s{{[0-9]+}}|
53
54; SI: v_sub_f32_e64 [[TMP:v[0-9]+]], 0.5, |s{{[0-9]+}}|
55; SI-SAFE-NOT: v_cvt_flr_i32_f32
56; SI-NONAN: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]]
57; SI: s_endpgm
58define void @cvt_rpi_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 {
59  %x.fabs = call float @llvm.fabs.f32(float %x) #1
60  %x.fabs.fneg = fsub float -0.000000e+00, %x.fabs
61  %fadd = fadd float %x.fabs.fneg, 0.5
62  %floor = call float @llvm.floor.f32(float %fadd) #1
63  %cvt = fptosi float %floor to i32
64  store i32 %cvt, i32 addrspace(1)* %out
65  ret void
66}
67
68; FUNC-LABEL: {{^}}no_cvt_rpi_i32_f32_0:
69; SI-NOT: v_cvt_rpi_i32_f32
70; SI: v_add_f32
71; SI: v_floor_f32
72; SI: v_cvt_u32_f32
73; SI: s_endpgm
74define void @no_cvt_rpi_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 {
75  %fadd = fadd float %x, 0.5
76  %floor = call float @llvm.floor.f32(float %fadd) #1
77  %cvt = fptoui float %floor to i32
78  store i32 %cvt, i32 addrspace(1)* %out
79  ret void
80}
81
82attributes #0 = { nounwind }
83attributes #1 = { nounwind readnone }
Note: See TracBrowser for help on using the repository browser.