source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/fmax3.f64.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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Line 
1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3
4declare double @llvm.maxnum.f64(double, double) nounwind readnone
5
6; SI-LABEL: {{^}}test_fmax3_f64:
7; SI-DAG: buffer_load_dwordx2 [[REGA:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0{{$}}
8; SI-DAG: buffer_load_dwordx2 [[REGB:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:8
9; SI-DAG: buffer_load_dwordx2 [[REGC:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}}], 0 offset:16
10; SI: v_max_f64 [[REGA]], [[REGA]], [[REGB]]
11; SI: v_max_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[REGA]], [[REGC]]
12; SI: buffer_store_dwordx2 [[RESULT]],
13; SI: s_endpgm
14define void @test_fmax3_f64(double addrspace(1)* %out, double addrspace(1)* %aptr) nounwind {
15  %bptr = getelementptr double, double addrspace(1)* %aptr, i32 1
16  %cptr = getelementptr double, double addrspace(1)* %aptr, i32 2
17  %a = load double, double addrspace(1)* %aptr, align 8
18  %b = load double, double addrspace(1)* %bptr, align 8
19  %c = load double, double addrspace(1)* %cptr, align 8
20  %f0 = call double @llvm.maxnum.f64(double %a, double %b) nounwind readnone
21  %f1 = call double @llvm.maxnum.f64(double %f0, double %c) nounwind readnone
22  store double %f1, double addrspace(1)* %out, align 8
23  ret void
24}
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