source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/fneg-fabs.f64.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3
4; FIXME: Check something here. Currently it seems fabs + fneg aren't
5; into 2 modifiers, although theoretically that should work.
6
7; FUNC-LABEL: {{^}}fneg_fabs_fadd_f64:
8; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|v{{\[[0-9]+:[0-9]+\]}}|
9define void @fneg_fabs_fadd_f64(double addrspace(1)* %out, double %x, double %y) {
10  %fabs = call double @llvm.fabs.f64(double %x)
11  %fsub = fsub double -0.000000e+00, %fabs
12  %fadd = fadd double %y, %fsub
13  store double %fadd, double addrspace(1)* %out, align 8
14  ret void
15}
16
17define void @v_fneg_fabs_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %xptr, double addrspace(1)* %yptr) {
18  %x = load double, double addrspace(1)* %xptr, align 8
19  %y = load double, double addrspace(1)* %xptr, align 8
20  %fabs = call double @llvm.fabs.f64(double %x)
21  %fsub = fsub double -0.000000e+00, %fabs
22  %fadd = fadd double %y, %fsub
23  store double %fadd, double addrspace(1)* %out, align 8
24  ret void
25}
26
27; FUNC-LABEL: {{^}}fneg_fabs_fmul_f64:
28; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|{{v\[[0-9]+:[0-9]+\]}}|
29define void @fneg_fabs_fmul_f64(double addrspace(1)* %out, double %x, double %y) {
30  %fabs = call double @llvm.fabs.f64(double %x)
31  %fsub = fsub double -0.000000e+00, %fabs
32  %fmul = fmul double %y, %fsub
33  store double %fmul, double addrspace(1)* %out, align 8
34  ret void
35}
36
37; FUNC-LABEL: {{^}}fneg_fabs_free_f64:
38define void @fneg_fabs_free_f64(double addrspace(1)* %out, i64 %in) {
39  %bc = bitcast i64 %in to double
40  %fabs = call double @llvm.fabs.f64(double %bc)
41  %fsub = fsub double -0.000000e+00, %fabs
42  store double %fsub, double addrspace(1)* %out
43  ret void
44}
45
46; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f64:
47; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
48; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
49define void @fneg_fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
50  %bc = bitcast i64 %in to double
51  %fabs = call double @fabs(double %bc)
52  %fsub = fsub double -0.000000e+00, %fabs
53  store double %fsub, double addrspace(1)* %out
54  ret void
55}
56
57; FUNC-LABEL: {{^}}fneg_fabs_f64:
58; SI: s_load_dwordx2 s{{\[}}[[LO_X:[0-9]+]]:[[HI_X:[0-9]+]]{{\]}}
59; SI: s_load_dwordx2
60; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
61; SI-DAG: v_or_b32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]]
62; SI-DAG: v_mov_b32_e32 v[[LO_V:[0-9]+]], s[[LO_X]]
63; SI: buffer_store_dwordx2 v{{\[}}[[LO_V]]:[[HI_V]]{{\]}}
64define void @fneg_fabs_f64(double addrspace(1)* %out, double %in) {
65  %fabs = call double @llvm.fabs.f64(double %in)
66  %fsub = fsub double -0.000000e+00, %fabs
67  store double %fsub, double addrspace(1)* %out, align 8
68  ret void
69}
70
71; FUNC-LABEL: {{^}}fneg_fabs_v2f64:
72; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
73; SI-NOT: 0x80000000
74; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
75; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
76define void @fneg_fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
77  %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)
78  %fsub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %fabs
79  store <2 x double> %fsub, <2 x double> addrspace(1)* %out
80  ret void
81}
82
83; FUNC-LABEL: {{^}}fneg_fabs_v4f64:
84; SI: v_mov_b32_e32 [[IMMREG:v[0-9]+]], 0x80000000
85; SI-NOT: 0x80000000
86; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
87; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
88; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
89; SI: v_or_b32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
90define void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
91  %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
92  %fsub = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %fabs
93  store <4 x double> %fsub, <4 x double> addrspace(1)* %out
94  ret void
95}
96
97declare double @fabs(double) readnone
98declare double @llvm.fabs.f64(double) readnone
99declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
100declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone
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