source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/fneg-fabs.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
4
5; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32:
6; SI-NOT: and
7; SI: v_sub_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, |{{v[0-9]+}}|
8define void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) {
9  %fabs = call float @llvm.fabs.f32(float %x)
10  %fsub = fsub float -0.000000e+00, %fabs
11  %fadd = fadd float %y, %fsub
12  store float %fadd, float addrspace(1)* %out, align 4
13  ret void
14}
15
16; FUNC-LABEL: {{^}}fneg_fabs_fmul_f32:
17; SI-NOT: and
18; SI: v_mul_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, -|{{v[0-9]+}}|
19; SI-NOT: and
20define void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) {
21  %fabs = call float @llvm.fabs.f32(float %x)
22  %fsub = fsub float -0.000000e+00, %fabs
23  %fmul = fmul float %y, %fsub
24  store float %fmul, float addrspace(1)* %out, align 4
25  ret void
26}
27
28; DAGCombiner will transform:
29; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
30; unless isFabsFree returns true
31
32; FUNC-LABEL: {{^}}fneg_fabs_free_f32:
33; R600-NOT: AND
34; R600: |PV.{{[XYZW]}}|
35; R600: -PV
36
37; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
38define void @fneg_fabs_free_f32(float addrspace(1)* %out, i32 %in) {
39  %bc = bitcast i32 %in to float
40  %fabs = call float @llvm.fabs.f32(float %bc)
41  %fsub = fsub float -0.000000e+00, %fabs
42  store float %fsub, float addrspace(1)* %out
43  ret void
44}
45
46; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f32:
47; R600-NOT: AND
48; R600: |PV.{{[XYZW]}}|
49; R600: -PV
50
51; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
52define void @fneg_fabs_fn_free_f32(float addrspace(1)* %out, i32 %in) {
53  %bc = bitcast i32 %in to float
54  %fabs = call float @fabs(float %bc)
55  %fsub = fsub float -0.000000e+00, %fabs
56  store float %fsub, float addrspace(1)* %out
57  ret void
58}
59
60; FUNC-LABEL: {{^}}fneg_fabs_f32:
61; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
62define void @fneg_fabs_f32(float addrspace(1)* %out, float %in) {
63  %fabs = call float @llvm.fabs.f32(float %in)
64  %fsub = fsub float -0.000000e+00, %fabs
65  store float %fsub, float addrspace(1)* %out, align 4
66  ret void
67}
68
69; FUNC-LABEL: {{^}}v_fneg_fabs_f32:
70; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
71define void @v_fneg_fabs_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
72  %val = load float, float addrspace(1)* %in, align 4
73  %fabs = call float @llvm.fabs.f32(float %val)
74  %fsub = fsub float -0.000000e+00, %fabs
75  store float %fsub, float addrspace(1)* %out, align 4
76  ret void
77}
78
79; FUNC-LABEL: {{^}}fneg_fabs_v2f32:
80; R600: |{{(PV|T[0-9])\.[XYZW]}}|
81; R600: -PV
82; R600: |{{(PV|T[0-9])\.[XYZW]}}|
83; R600: -PV
84
85; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
86; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
87define void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) {
88  %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)
89  %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs
90  store <2 x float> %fsub, <2 x float> addrspace(1)* %out
91  ret void
92}
93
94; FUNC-LABEL: {{^}}fneg_fabs_v4f32:
95; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
96; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
97; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
98; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}}
99define void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
100  %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)
101  %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs
102  store <4 x float> %fsub, <4 x float> addrspace(1)* %out
103  ret void
104}
105
106declare float @fabs(float) readnone
107declare float @llvm.fabs.f32(float) readnone
108declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
109declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone
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