source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/llvm.AMDGPU.fract.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
3; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=FUNC %s
4; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
5
6declare float @llvm.fabs.f32(float  %Val)
7declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone
8
9; Legacy name
10declare float @llvm.AMDIL.fraction.f32(float) nounwind readnone
11
12; FUNC-LABEL: {{^}}fract_f32:
13; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
14; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
15; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
16; GCN: buffer_store_dword [[RESULT]]
17; EG: FRACT
18define void @fract_f32(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
19  %val = load float, float addrspace(1)* %src, align 4
20  %fract = call float @llvm.AMDGPU.fract.f32(float %val) nounwind readnone
21  store float %fract, float addrspace(1)* %out, align 4
22  ret void
23}
24
25; FUNC-LABEL: {{^}}fract_f32_legacy_amdil:
26; CI: v_fract_f32_e32 [[RESULT:v[0-9]+]], [[INPUT:v[0-9]+]]
27; SI: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
28; SI: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
29; GCN: buffer_store_dword [[RESULT]]
30; EG: FRACT
31define void @fract_f32_legacy_amdil(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
32  %val = load float, float addrspace(1)* %src, align 4
33  %fract = call float @llvm.AMDIL.fraction.f32(float %val) nounwind readnone
34  store float %fract, float addrspace(1)* %out, align 4
35  ret void
36}
37
38; FUNC-LABEL: {{^}}fract_f32_neg:
39; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT:v[0-9]+]]
40; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
41; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
42; GCN: buffer_store_dword [[RESULT]]
43; EG: FRACT
44define void @fract_f32_neg(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
45  %val = load float, float addrspace(1)* %src, align 4
46  %neg = fsub float 0.0, %val
47  %fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
48  store float %fract, float addrspace(1)* %out, align 4
49  ret void
50}
51
52; FUNC-LABEL: {{^}}fract_f32_neg_abs:
53; CI: v_fract_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
54; SI: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
55; SI: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
56; GCN: buffer_store_dword [[RESULT]]
57; EG: FRACT
58define void @fract_f32_neg_abs(float addrspace(1)* %out, float addrspace(1)* %src) nounwind {
59  %val = load float, float addrspace(1)* %src, align 4
60  %abs = call float @llvm.fabs.f32(float %val)
61  %neg = fsub float 0.0, %abs
62  %fract = call float @llvm.AMDGPU.fract.f32(float %neg) nounwind readnone
63  store float %fract, float addrspace(1)* %out, align 4
64  ret void
65}
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