source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/llvm.AMDGPU.rcp.f64.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 1.2 KB
Line 
1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3
4declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
5declare double @llvm.sqrt.f64(double) nounwind readnone
6
7; FUNC-LABEL: {{^}}rcp_f64:
8; SI: v_rcp_f64_e32
9define void @rcp_f64(double addrspace(1)* %out, double %src) nounwind {
10  %rcp = call double @llvm.AMDGPU.rcp.f64(double %src) nounwind readnone
11  store double %rcp, double addrspace(1)* %out, align 8
12  ret void
13}
14
15; FUNC-LABEL: {{^}}rcp_pat_f64:
16; SI: v_rcp_f64_e32
17define void @rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
18  %rcp = fdiv double 1.0, %src
19  store double %rcp, double addrspace(1)* %out, align 8
20  ret void
21}
22
23; FUNC-LABEL: {{^}}rsq_rcp_pat_f64:
24; SI-UNSAFE: v_rsq_f64_e32
25; SI-SAFE-NOT: v_rsq_f64_e32
26; SI-SAFE: v_sqrt_f64
27; SI-SAFE: v_rcp_f64
28define void @rsq_rcp_pat_f64(double addrspace(1)* %out, double %src) nounwind {
29  %sqrt = call double @llvm.sqrt.f64(double %src) nounwind readnone
30  %rcp = call double @llvm.AMDGPU.rcp.f64(double %sqrt) nounwind readnone
31  store double %rcp, double addrspace(1)* %out, align 8
32  ret void
33}
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