source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/llvm.SI.image.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.5 KB
Line 
1;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
2;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
3
4;CHECK-LABEL: {{^}}image_load:
5;CHECK: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
6define void @image_load() #0 {
7main_body:
8  %r = call <4 x float> @llvm.SI.image.load.v4i32(<4 x i32> undef, <8 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
9  %r0 = extractelement <4 x float> %r, i32 0
10  %r1 = extractelement <4 x float> %r, i32 1
11  %r2 = extractelement <4 x float> %r, i32 2
12  %r3 = extractelement <4 x float> %r, i32 3
13  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
14  ret void
15}
16
17;CHECK-LABEL: {{^}}image_load_mip:
18;CHECK: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
19define void @image_load_mip() #0 {
20main_body:
21  %r = call <4 x float> @llvm.SI.image.load.mip.v4i32(<4 x i32> undef, <8 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
22  %r0 = extractelement <4 x float> %r, i32 0
23  %r1 = extractelement <4 x float> %r, i32 1
24  %r2 = extractelement <4 x float> %r, i32 2
25  %r3 = extractelement <4 x float> %r, i32 3
26  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
27  ret void
28}
29
30;CHECK-LABEL: {{^}}getresinfo:
31;CHECK: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
32define void @getresinfo() #0 {
33main_body:
34  %r = call <4 x float> @llvm.SI.getresinfo.i32(i32 undef, <8 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
35  %r0 = extractelement <4 x float> %r, i32 0
36  %r1 = extractelement <4 x float> %r, i32 1
37  %r2 = extractelement <4 x float> %r, i32 2
38  %r3 = extractelement <4 x float> %r, i32 3
39  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %r0, float %r1, float %r2, float %r3)
40  ret void
41}
42
43declare <4 x float> @llvm.SI.image.load.v4i32(<4 x i32>, <8 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
44declare <4 x float> @llvm.SI.image.load.mip.v4i32(<4 x i32>, <8 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
45declare <4 x float> @llvm.SI.getresinfo.i32(i32, <8 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #1
46
47declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
48
49attributes #0 = { "ShaderType"="0" }
50attributes #1 = { nounwind readnone }
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