source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/m0-spill.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 1.2 KB
Line 
1; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
3
4@lds = external addrspace(3) global [64 x float]
5
6; CHECK-LABEL: {{^}}main:
7; CHECK-NOT: v_readlane_b32 m0
8define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) "ShaderType"="0" {
9main_body:
10  %4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
11  %cmp = fcmp ueq float 0.0, %4
12  br i1 %cmp, label %if, label %else
13
14if:
15  %lds_ptr = getelementptr [64 x float], [64 x float] addrspace(3)* @lds, i32 0, i32 0
16  %lds_data = load float, float addrspace(3)* %lds_ptr
17  br label %endif
18
19else:
20  %interp = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
21  br label %endif
22
23endif:
24  %export = phi float [%lds_data, %if], [%interp, %else]
25  %5 = call i32 @llvm.SI.packf16(float %export, float %export)
26  %6 = bitcast i32 %5 to float
27  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
28  ret void
29}
30
31declare float @llvm.SI.fs.constant(i32, i32, i32) readnone
32
33declare i32 @llvm.SI.packf16(float, float) readnone
34
35declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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