source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/schedule-fs-loop.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.2 KB
Line 
1;RUN: llc < %s -march=r600 -mcpu=cayman -stress-sched -verify-misched -verify-machineinstrs
2;REQUIRES: asserts
3
4define void @main() {
5main_body:
6  %0 = load <4 x float>, <4 x float> addrspace(9)* null
7  %1 = extractelement <4 x float> %0, i32 3
8  %2 = fptosi float %1 to i32
9  %3 = bitcast i32 %2 to float
10  %4 = load <4 x float>, <4 x float> addrspace(9)* null
11  %5 = extractelement <4 x float> %4, i32 0
12  %6 = load <4 x float>, <4 x float> addrspace(9)* null
13  %7 = extractelement <4 x float> %6, i32 1
14  %8 = load <4 x float>, <4 x float> addrspace(9)* null
15  %9 = extractelement <4 x float> %8, i32 2
16  br label %LOOP
17
18LOOP:                                             ; preds = %ENDIF, %main_body
19  %temp4.0 = phi float [ %5, %main_body ], [ %temp5.0, %ENDIF ]
20  %temp5.0 = phi float [ %7, %main_body ], [ %temp6.0, %ENDIF ]
21  %temp6.0 = phi float [ %9, %main_body ], [ %temp4.0, %ENDIF ]
22  %temp8.0 = phi float [ 0.000000e+00, %main_body ], [ %27, %ENDIF ]
23  %10 = bitcast float %temp8.0 to i32
24  %11 = bitcast float %3 to i32
25  %12 = icmp sge i32 %10, %11
26  %13 = sext i1 %12 to i32
27  %14 = bitcast i32 %13 to float
28  %15 = bitcast float %14 to i32
29  %16 = icmp ne i32 %15, 0
30  br i1 %16, label %IF, label %ENDIF
31
32IF:                                               ; preds = %LOOP
33  %17 = call float @llvm.AMDIL.clamp.(float %temp4.0, float 0.000000e+00, float 1.000000e+00)
34  %18 = call float @llvm.AMDIL.clamp.(float %temp5.0, float 0.000000e+00, float 1.000000e+00)
35  %19 = call float @llvm.AMDIL.clamp.(float %temp6.0, float 0.000000e+00, float 1.000000e+00)
36  %20 = call float @llvm.AMDIL.clamp.(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00)
37  %21 = insertelement <4 x float> undef, float %17, i32 0
38  %22 = insertelement <4 x float> %21, float %18, i32 1
39  %23 = insertelement <4 x float> %22, float %19, i32 2
40  %24 = insertelement <4 x float> %23, float %20, i32 3
41  call void @llvm.R600.store.swizzle(<4 x float> %24, i32 0, i32 0)
42  ret void
43
44ENDIF:                                            ; preds = %LOOP
45  %25 = bitcast float %temp8.0 to i32
46  %26 = add i32 %25, 1
47  %27 = bitcast i32 %26 to float
48  br label %LOOP
49}
50
51declare float @llvm.AMDIL.clamp.(float, float, float) #0
52
53declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
54
55attributes #0 = { readnone }
Note: See TracBrowser for help on using the repository browser.