source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/shl_add_constant.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 3.4 KB
Line 
1; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2
3declare i32 @llvm.r600.read.tidig.x() #1
4
5; Test with inline immediate
6
7; FUNC-LABEL: {{^}}shl_2_add_9_i32:
8; SI: v_lshlrev_b32_e32  [[REG:v[0-9]+]], 2, {{v[0-9]+}}
9; SI: v_add_i32_e32 [[RESULT:v[0-9]+]], vcc, 36, [[REG]]
10; SI: buffer_store_dword [[RESULT]]
11; SI: s_endpgm
12define void @shl_2_add_9_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
13  %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
14  %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %tid.x
15  %val = load i32, i32 addrspace(1)* %ptr, align 4
16  %add = add i32 %val, 9
17  %result = shl i32 %add, 2
18  store i32 %result, i32 addrspace(1)* %out, align 4
19  ret void
20}
21
22; FUNC-LABEL: {{^}}shl_2_add_9_i32_2_add_uses:
23; SI-DAG: v_add_i32_e32 [[ADDREG:v[0-9]+]], vcc, 9, {{v[0-9]+}}
24; SI-DAG: v_lshlrev_b32_e32 [[SHLREG:v[0-9]+]], 2, {{v[0-9]+}}
25; SI-DAG: buffer_store_dword [[ADDREG]]
26; SI-DAG: buffer_store_dword [[SHLREG]]
27; SI: s_endpgm
28define void @shl_2_add_9_i32_2_add_uses(i32 addrspace(1)* %out0, i32 addrspace(1)* %out1, i32 addrspace(1)* %in) #0 {
29  %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
30  %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %tid.x
31  %val = load i32, i32 addrspace(1)* %ptr, align 4
32  %add = add i32 %val, 9
33  %result = shl i32 %add, 2
34  store i32 %result, i32 addrspace(1)* %out0, align 4
35  store i32 %add, i32 addrspace(1)* %out1, align 4
36  ret void
37}
38
39; Test with add literal constant
40
41; FUNC-LABEL: {{^}}shl_2_add_999_i32:
42; SI: v_lshlrev_b32_e32  [[REG:v[0-9]+]], 2, {{v[0-9]+}}
43; SI: v_add_i32_e32 [[RESULT:v[0-9]+]], vcc, 0xf9c, [[REG]]
44; SI: buffer_store_dword [[RESULT]]
45; SI: s_endpgm
46define void @shl_2_add_999_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 {
47  %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
48  %ptr = getelementptr i32, i32 addrspace(1)* %in, i32 %tid.x
49  %val = load i32, i32 addrspace(1)* %ptr, align 4
50  %shl = add i32 %val, 999
51  %result = shl i32 %shl, 2
52  store i32 %result, i32 addrspace(1)* %out, align 4
53  ret void
54}
55
56; FUNC-LABEL: {{^}}test_add_shl_add_constant:
57; SI-DAG: s_load_dword [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
58; SI-DAG: s_load_dword [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
59; SI: s_lshl_b32 [[SHL3:s[0-9]+]], [[X]], 3
60; SI: s_add_i32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
61; SI: s_add_i32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
62; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[RESULT]]
63; SI: buffer_store_dword [[VRESULT]]
64define void @test_add_shl_add_constant(i32 addrspace(1)* %out, i32 %x, i32 %y) #0 {
65  %add.0 = add i32 %x, 123
66  %shl = shl i32 %add.0, 3
67  %add.1 = add i32 %shl, %y
68   store i32 %add.1, i32 addrspace(1)* %out, align 4
69  ret void
70}
71
72; FUNC-LABEL: {{^}}test_add_shl_add_constant_inv:
73; SI-DAG: s_load_dword [[X:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
74; SI-DAG: s_load_dword [[Y:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
75; SI: s_lshl_b32 [[SHL3:s[0-9]+]], [[X]], 3
76; SI: s_add_i32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
77; SI: s_add_i32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
78; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[RESULT]]
79; SI: buffer_store_dword [[VRESULT]]
80
81define void @test_add_shl_add_constant_inv(i32 addrspace(1)* %out, i32 %x, i32 %y) #0 {
82  %add.0 = add i32 %x, 123
83  %shl = shl i32 %add.0, 3
84  %add.1 = add i32 %y, %shl
85  store i32 %add.1, i32 addrspace(1)* %out, align 4
86  ret void
87}
88
89attributes #0 = { nounwind }
90attributes #1 = { nounwind readnone }
Note: See TracBrowser for help on using the repository browser.