source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 703 bytes
Line 
1; RUN: llc -o /dev/null %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos 2>&1 | FileCheck %s
2; This test verifies that the instruction selection will add the implicit
3; register operands in the correct order when modifying the opcode of an
4; instruction to V_ADD_I32_e32.
5
6; CHECK: %{{[0-9]+}} = V_ADD_I32_e32 %{{[0-9]+}}, %{{[0-9]+}}, implicit-def %vcc, implicit %exec
7
8define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
9entry:
10  %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
11  %a = load i32, i32 addrspace(1)* %in
12  %b = load i32, i32 addrspace(1)* %b_ptr
13  %result = add i32 %a, %b
14  store i32 %result, i32 addrspace(1)* %out
15  ret void
16}
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