source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc < %s -march=arm | FileCheck %s
2; RUN: llc < %s -march=arm -enable-tail-merge=0 | \
3; RUN:   FileCheck --check-prefix=NOMERGE %s
4
5; Check that tail merging is the default on ARM, and that -enable-tail-merge=0
6; works.
7; PR1628
8
9; CHECK: bl _baz
10; CHECK-NOT: bl _baz
11
12; CHECK: bl _quux
13; CHECK-NOT: bl _quux
14
15; NOMERGE: bl _baz
16; NOMERGE: bl _baz
17
18; NOMERGE: bl _quux
19; NOMERGE: bl _quux
20
21; ModuleID = 'tail.c'
22target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
23target triple = "i686-apple-darwin8"
24
25define i32 @f(i32 %i, i32 %q) {
26entry:
27        %i_addr = alloca i32            ; <i32*> [#uses=2]
28        %q_addr = alloca i32            ; <i32*> [#uses=2]
29        %retval = alloca i32, align 4           ; <i32*> [#uses=1]
30        store i32 %i, i32* %i_addr
31        store i32 %q, i32* %q_addr
32        %tmp = load i32, i32* %i_addr           ; <i32> [#uses=1]
33        %tmp1 = icmp ne i32 %tmp, 0             ; <i1> [#uses=1]
34        %tmp12 = zext i1 %tmp1 to i8            ; <i8> [#uses=1]
35        %toBool = icmp ne i8 %tmp12, 0          ; <i1> [#uses=1]
36        br i1 %toBool, label %cond_true, label %cond_false
37
38cond_true:              ; preds = %entry
39        %tmp3 = call i32 (...) @bar( )          ; <i32> [#uses=0]
40        %tmp4 = call i32 (...) @baz( i32 5, i32 6 )             ; <i32> [#uses=0]
41        %tmp7 = load i32, i32* %q_addr          ; <i32> [#uses=1]
42        %tmp8 = icmp ne i32 %tmp7, 0            ; <i1> [#uses=1]
43        %tmp89 = zext i1 %tmp8 to i8            ; <i8> [#uses=1]
44        %toBool10 = icmp ne i8 %tmp89, 0                ; <i1> [#uses=1]
45        br i1 %toBool10, label %cond_true11, label %cond_false15
46
47cond_false:             ; preds = %entry
48        %tmp5 = call i32 (...) @foo( )          ; <i32> [#uses=0]
49        %tmp6 = call i32 (...) @baz( i32 5, i32 6 )             ; <i32> [#uses=0]
50        %tmp27 = load i32, i32* %q_addr         ; <i32> [#uses=1]
51        %tmp28 = icmp ne i32 %tmp27, 0          ; <i1> [#uses=1]
52        %tmp289 = zext i1 %tmp28 to i8          ; <i8> [#uses=1]
53        %toBool210 = icmp ne i8 %tmp289, 0              ; <i1> [#uses=1]
54        br i1 %toBool210, label %cond_true11, label %cond_false15
55
56cond_true11:            ; preds = %cond_next
57        %tmp13 = call i32 (...) @foo( )         ; <i32> [#uses=0]
58        %tmp14 = call i32 (...) @quux( i32 3, i32 4 )           ; <i32> [#uses=0]
59        br label %cond_next18
60
61cond_false15:           ; preds = %cond_next
62        %tmp16 = call i32 (...) @bar( )         ; <i32> [#uses=0]
63        %tmp17 = call i32 (...) @quux( i32 3, i32 4 )           ; <i32> [#uses=0]
64        br label %cond_next18
65
66cond_next18:            ; preds = %cond_false15, %cond_true11
67        %tmp19 = call i32 (...) @bar( )         ; <i32> [#uses=0]
68        br label %return
69
70return:         ; preds = %cond_next18
71        %retval20 = load i32, i32* %retval              ; <i32> [#uses=1]
72        ret i32 %retval20
73}
74
75declare i32 @bar(...)
76
77declare i32 @baz(...)
78
79declare i32 @foo(...)
80
81declare i32 @quux(...)
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