source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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Line 
1; RUN: llc -mtriple=arm-eabi -mattr=+neon -print-before=post-RA-sched %s -o - 2>&1 \
2; RUN:  | FileCheck %s
3
4define void @vst(i8* %m, [4 x i64] %v) {
5entry:
6; CHECK: vst:
7; CHECK: VST1d64Q %R{{[0-9]+}}<kill>, 8, %D{{[0-9]+}}, pred:14, pred:%noreg, %Q{{[0-9]+}}_Q{{[0-9]+}}<imp-use,kill>
8
9  %v0 = extractvalue [4 x i64] %v, 0
10  %v1 = extractvalue [4 x i64] %v, 1
11  %v2 = extractvalue [4 x i64] %v, 2
12  %v3 = extractvalue [4 x i64] %v, 3
13
14  %t0 = bitcast i64 %v0 to <8 x i8>
15  %t1 = bitcast i64 %v1 to <8 x i8>
16  %t2 = bitcast i64 %v2 to <8 x i8>
17  %t3 = bitcast i64 %v3 to <8 x i8>
18
19  %s0 = bitcast <8 x i8> %t0 to <1 x i64>
20  %s1 = bitcast <8 x i8> %t1 to <1 x i64>
21  %s2 = bitcast <8 x i8> %t2 to <1 x i64>
22  %s3 = bitcast <8 x i8> %t3 to <1 x i64>
23
24  %tmp0 = bitcast <1 x i64> %s2 to i64
25  %tmp1 = bitcast <1 x i64> %s3 to i64
26
27  %n0 = insertelement <2 x i64> undef, i64 %tmp0, i32 0
28  %n1 = insertelement <2 x i64> %n0, i64 %tmp1, i32 1
29
30  call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %m, <1 x i64> %s0, <1 x i64> %s1, <1 x i64> %s2, <1 x i64> %s3, i32 8)
31
32  call void @bar(<2 x i64> %n1)
33
34  ret void
35}
36
37%struct.__neon_int8x8x4_t = type { <8 x i8>,  <8 x i8>,  <8 x i8>, <8 x i8> }
38define <8 x i8> @vtbx4(<8 x i8>* %A, %struct.__neon_int8x8x4_t* %B, <8 x i8>* %C) nounwind {
39; CHECK: vtbx4:
40; CHECK: VTBX4 {{.*}}, pred:14, pred:%noreg, %Q{{[0-9]+}}_Q{{[0-9]+}}<imp-use>
41        %tmp1 = load <8 x i8>, <8 x i8>* %A
42        %tmp2 = load %struct.__neon_int8x8x4_t, %struct.__neon_int8x8x4_t* %B
43        %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
44        %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
45        %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
46        %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
47        %tmp7 = load <8 x i8>, <8 x i8>* %C
48        %tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8> %tmp5, <8 x i8> %tmp6, <8 x i8> %tmp7)
49  call void @bar2(%struct.__neon_int8x8x4_t %tmp2, <8 x i8> %tmp8)
50        ret <8 x i8> %tmp8
51}
52
53declare void @llvm.arm.neon.vst4.p0i8.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32)
54declare <8 x i8>  @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
55declare void @bar2(%struct.__neon_int8x8x4_t, <8 x i8>)
56declare void @bar(<2 x i64> %arg)
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