source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/call-tc.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

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1; RUN: llc < %s -mtriple=armv6-apple-ios5.0 -mattr=+vfp2 -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=CHECKV6
2; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=CHECKT2D
3; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-atomic-cfg-tidy=0 \
4; RUN:    | FileCheck %s -check-prefix=CHECKELF
5
6; Enable tailcall optimization for iOS 5.0
7; rdar://9120031
8
9@t = weak global i32 ()* null           ; <i32 ()**> [#uses=1]
10
11declare void @g(i32, i32, i32, i32)
12
13define void @t1() {
14; CHECKELF-LABEL: t1:
15; CHECKELF: bl g(PLT)
16        call void @g( i32 1, i32 2, i32 3, i32 4 )
17        ret void
18}
19
20define void @t2() {
21; CHECKV6-LABEL: t2:
22; CHECKV6: bx r0
23; CHECKT2D-LABEL: t2:
24; CHECKT2D: ldr
25; CHECKT2D-NEXT: ldr
26; CHECKT2D-NEXT: bx r0
27        %tmp = load i32 ()*, i32 ()** @t         ; <i32 ()*> [#uses=1]
28        %tmp.upgrd.2 = tail call i32 %tmp( )            ; <i32> [#uses=0]
29        ret void
30}
31
32define void @t3() {
33; CHECKV6-LABEL: t3:
34; CHECKV6: b _t2
35; CHECKELF-LABEL: t3:
36; CHECKELF: b t2(PLT)
37; CHECKT2D-LABEL: t3:
38; CHECKT2D: b.w _t2
39
40        tail call void @t2( )            ; <i32> [#uses=0]
41        ret void
42}
43
44; Sibcall optimization of expanded libcalls. rdar://8707777
45define double @t4(double %a) nounwind readonly ssp {
46entry:
47; CHECKV6-LABEL: t4:
48; CHECKV6: b _sin
49; CHECKELF-LABEL: t4:
50; CHECKELF: b sin(PLT)
51  %0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1]
52  ret double %0
53}
54
55define float @t5(float %a) nounwind readonly ssp {
56entry:
57; CHECKV6-LABEL: t5:
58; CHECKV6: b _sinf
59; CHECKELF-LABEL: t5:
60; CHECKELF: b sinf(PLT)
61  %0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1]
62  ret float %0
63}
64
65declare float @sinf(float) nounwind readonly
66
67declare double @sin(double) nounwind readonly
68
69define i32 @t6(i32 %a, i32 %b) nounwind readnone {
70entry:
71; CHECKV6-LABEL: t6:
72; CHECKV6: b ___divsi3
73; CHECKELF-LABEL: t6:
74; CHECKELF: b __aeabi_idiv(PLT)
75  %0 = sdiv i32 %a, %b
76  ret i32 %0
77}
78
79; Make sure the tail call instruction isn't deleted
80; rdar://8309338
81declare void @foo() nounwind
82
83define void @t7() nounwind {
84entry:
85; CHECKT2D-LABEL: t7:
86; CHECKT2D: it ne
87; CHECKT2D-NEXT: bne.w _foo
88; CHECKT2D-NEXT: push
89; CHECKT2D-NEXT: mov r7, sp
90; CHECKT2D-NEXT: blx _foo
91  br i1 undef, label %bb, label %bb1.lr.ph
92
93bb1.lr.ph:
94  tail call void @foo() nounwind
95  unreachable
96
97bb:
98  tail call void @foo() nounwind
99  ret void
100}
101
102; Make sure codegenprep is duplicating ret instructions to enable tail calls.
103; rdar://11140249
104define i32 @t8(i32 %x) nounwind ssp {
105entry:
106; CHECKT2D-LABEL: t8:
107; CHECKT2D-NOT: push
108  %and = and i32 %x, 1
109  %tobool = icmp eq i32 %and, 0
110  br i1 %tobool, label %if.end, label %if.then
111
112if.then:                                          ; preds = %entry
113; CHECKT2D: bne.w _a
114  %call = tail call i32 @a(i32 %x) nounwind
115  br label %return
116
117if.end:                                           ; preds = %entry
118  %and1 = and i32 %x, 2
119  %tobool2 = icmp eq i32 %and1, 0
120  br i1 %tobool2, label %if.end5, label %if.then3
121
122if.then3:                                         ; preds = %if.end
123; CHECKT2D: bne.w _b
124  %call4 = tail call i32 @b(i32 %x) nounwind
125  br label %return
126
127if.end5:                                          ; preds = %if.end
128; CHECKT2D: b.w _c
129  %call6 = tail call i32 @c(i32 %x) nounwind
130  br label %return
131
132return:                                           ; preds = %if.end5, %if.then3, %if.then
133  %retval.0 = phi i32 [ %call, %if.then ], [ %call4, %if.then3 ], [ %call6, %if.end5 ]
134  ret i32 %retval.0
135}
136
137declare i32 @a(i32)
138
139declare i32 @b(i32)
140
141declare i32 @c(i32)
142
143; PR12419
144; rdar://11195178
145; Use the correct input chain for the tailcall node or else the call to
146; _ZN9MutexLockD1Ev would be lost.
147%class.MutexLock = type { i8 }
148
149@x = external global i32, align 4
150
151define i32 @t9() nounwind {
152; CHECKT2D-LABEL: t9:
153; CHECKT2D: blx __ZN9MutexLockC1Ev
154; CHECKT2D: blx __ZN9MutexLockD1Ev
155; CHECKT2D: b.w ___divsi3
156  %lock = alloca %class.MutexLock, align 1
157  %1 = call %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock* %lock)
158  %2 = load i32, i32* @x, align 4
159  %3 = sdiv i32 1000, %2
160  %4 = call %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock* %lock)
161  ret i32 %3
162}
163
164declare %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock*) unnamed_addr nounwind align 2
165
166declare %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock*) unnamed_addr nounwind align 2
167
168; rdar://13827621
169; Correctly preserve the input chain for the tailcall node in the bitcast case,
170; otherwise the call to floorf is lost.
171define float @libcall_tc_test2(float* nocapture %a, float %b) {
172; CHECKT2D-LABEL: libcall_tc_test2:
173; CHECKT2D: blx _floorf
174; CHECKT2D: b.w _truncf
175  %1 = load float, float* %a, align 4
176  %call = tail call float @floorf(float %1)
177  store float %call, float* %a, align 4
178  %call1 = tail call float @truncf(float %b)
179  ret float %call1
180}
181
182declare float @floorf(float) readnone
183declare float @truncf(float) readnone
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