source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/fast-isel-vararg.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

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1; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM
3; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
4
5define i32 @VarArg() nounwind {
6entry:
7  %i = alloca i32, align 4
8  %j = alloca i32, align 4
9  %k = alloca i32, align 4
10  %m = alloca i32, align 4
11  %n = alloca i32, align 4
12  %tmp = alloca i32, align 4
13  %0 = load i32, i32* %i, align 4
14  %1 = load i32, i32* %j, align 4
15  %2 = load i32, i32* %k, align 4
16  %3 = load i32, i32* %m, align 4
17  %4 = load i32, i32* %n, align 4
18; ARM: VarArg
19; ARM: mov [[FP:r[0-9]+]], sp
20; ARM: sub sp, sp, #32
21; ARM: movw r0, #5
22; ARM: ldr r1, {{\[}}[[FP]], #-4]
23; ARM: ldr r2, {{\[}}[[FP]], #-8]
24; ARM: ldr r3, {{\[}}[[FP]], #-12]
25; ARM: ldr [[Ra:r[0-9]+]], [sp, #16]
26; ARM: ldr [[Rb:[lr]+[0-9]*]], [sp, #12]
27; ARM: str [[Ra]], [sp]
28; ARM: str [[Rb]], [sp, #4]
29; ARM: bl {{_?CallVariadic}}
30; THUMB: sub sp, #32
31; THUMB: movs r0, #5
32; THUMB: ldr r1, [sp, #28]
33; THUMB: ldr r2, [sp, #24]
34; THUMB: ldr r3, [sp, #20]
35; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #16]
36; THUMB: ldr.w {{[a-z0-9]+}}, [sp, #12]
37; THUMB: str.w {{[a-z0-9]+}}, [sp]
38; THUMB: str.w {{[a-z0-9]+}}, [sp, #4]
39; THUMB: bl {{_?}}CallVariadic
40  %call = call i32 (i32, ...) @CallVariadic(i32 5, i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
41  store i32 %call, i32* %tmp, align 4
42  %5 = load i32, i32* %tmp, align 4
43  ret i32 %5
44}
45
46declare i32 @CallVariadic(i32, ...)
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