source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/machine-licm.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.1 KB
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1; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -disable-fp-elim | FileCheck %s -check-prefix=THUMB
2; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim   | FileCheck %s -check-prefix=ARM
3; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -disable-fp-elim -mattr=+v6t2 | FileCheck %s -check-prefix=MOVT
4; rdar://7353541
5; rdar://7354376
6; rdar://8887598
7
8@GV = external global i32                         ; <i32*> [#uses=2]
9
10define void @t(i32* nocapture %vals, i32 %c) nounwind {
11entry:
12; ARM-LABEL: t:
13; ARM: ldr [[REGISTER_1:r[0-9]+]], LCPI0_0
14; ARM: LPC0_0:
15; ARM: ldr r{{[0-9]+}}, [pc, [[REGISTER_1]]]
16; ARM: ldr r{{[0-9]+}}, [r{{[0-9]+}}]
17
18; MOVT-LABEL: t:
19; MOVT: movw [[REGISTER_2:r[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+8))
20; MOVT: movt [[REGISTER_2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+8))
21; MOVT: LPC0_0:
22; MOVT: ldr r{{[0-9]+}}, [pc, [[REGISTER_2]]]
23; MOVT: ldr r{{[0-9]+}}, [r{{[0-9]+}}]
24
25; THUMB-LABEL: t:
26  %0 = icmp eq i32 %c, 0                          ; <i1> [#uses=1]
27  br i1 %0, label %return, label %bb.nph
28
29bb.nph:                                           ; preds = %entry
30; ARM: LCPI0_0:
31; ARM-NOT: LCPI0_1:
32; ARM: .section
33
34; THUMB: BB#1
35; THUMB: ldr r2, LCPI0_0
36; THUMB: add r2, pc
37; THUMB: ldr r{{[0-9]+}}, [r2]
38; THUMB: LBB0_2
39; THUMB: LCPI0_0:
40; THUMB-NOT: LCPI0_1:
41; THUMB: .section
42  %.pre = load i32, i32* @GV, align 4                  ; <i32> [#uses=1]
43  br label %bb
44
45bb:                                               ; preds = %bb, %bb.nph
46  %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ]    ; <i32> [#uses=1]
47  %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ]     ; <i32> [#uses=2]
48  %scevgep = getelementptr i32, i32* %vals, i32 %i.03  ; <i32*> [#uses=1]
49  %2 = load i32, i32* %scevgep, align 4                ; <i32> [#uses=1]
50  %3 = add nsw i32 %1, %2                         ; <i32> [#uses=2]
51  store i32 %3, i32* @GV, align 4
52  %4 = add i32 %i.03, 1                           ; <i32> [#uses=2]
53  %exitcond = icmp eq i32 %4, %c                  ; <i1> [#uses=1]
54  br i1 %exitcond, label %return, label %bb
55
56return:                                           ; preds = %bb, %entry
57  ret void
58}
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