source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/memcpy-inline.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 4.9 KB
Line 
1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv6m-apple-ios -mcpu=cortex-m0 -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-T1
3%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
4
5@src = external global %struct.x
6@dst = external global %struct.x
7
8@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
9@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
10@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
11@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR  \00", align 1
12@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
13@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
14@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
15
16define i32 @t0() {
17entry:
18; CHECK-LABEL: t0:
19; CHECK: vldr [[REG1:d[0-9]+]],
20; CHECK: vstr [[REG1]],
21; CHECK-T1-LABEL: t0:
22; CHECK-T1: ldrb [[TREG1:r[0-9]]],
23; CHECK-T1: strb [[TREG1]],
24; CHECK-T1: ldrh [[TREG2:r[0-9]]],
25; CHECK-T1: strh [[TREG2]]
26  call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i32 8, i1 false)
27  ret i32 0
28}
29
30define void @t1(i8* nocapture %C) nounwind {
31entry:
32; CHECK-LABEL: t1:
33; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
34; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
35; CHECK: adds r0, #15
36; CHECK: adds r1, #15
37; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
38; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
39  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i32 1, i1 false)
40  ret void
41}
42
43define void @t2(i8* nocapture %C) nounwind {
44entry:
45; CHECK-LABEL: t2:
46; CHECK: movw [[REG2:r[0-9]+]], #16716
47; CHECK: movt [[REG2:r[0-9]+]], #72
48; CHECK: str [[REG2]], [r0, #32]
49; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]!
50; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]!
51; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
52; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
53  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i32 1, i1 false)
54  ret void
55}
56
57define void @t3(i8* nocapture %C) nounwind {
58entry:
59; CHECK-LABEL: t3:
60; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]!
61; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]!
62; CHECK: vldr d{{[0-9]+}}, [r1]
63; CHECK: vst1.8 {d{{[0-9]+}}}, [r0]
64  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i32 1, i1 false)
65  ret void
66}
67
68define void @t4(i8* nocapture %C) nounwind {
69entry:
70; CHECK-LABEL: t4:
71; CHECK: vld1.64 {[[REG3:d[0-9]+]], [[REG4:d[0-9]+]]}, [r1]
72; CHECK: vst1.8 {[[REG3]], [[REG4]]}, [r0]!
73; CHECK: strh [[REG5:r[0-9]+]], [r0]
74  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i32 1, i1 false)
75  ret void
76}
77
78define void @t5(i8* nocapture %C) nounwind {
79entry:
80; CHECK-LABEL: t5:
81; CHECK: movs [[REG5:r[0-9]+]], #0
82; CHECK: strb [[REG5]], [r0, #6]
83; CHECK: movw [[REG6:r[0-9]+]], #21587
84; CHECK: strh [[REG6]], [r0, #4]
85; CHECK: movw [[REG7:r[0-9]+]], #18500
86; CHECK: movt [[REG7:r[0-9]+]], #22866
87; CHECK: str [[REG7]]
88; CHECK-T1-LABEL: t5:
89; CHECK-T1: movs [[TREG3:r[0-9]]],
90; CHECK-T1: strb [[TREG3]],
91; CHECK-T1: movs [[TREG4:r[0-9]]],
92; CHECK-T1: strb [[TREG4]],
93  tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false)
94  ret void
95}
96
97define void @t6() nounwind {
98entry:
99; CHECK-LABEL: t6:
100; CHECK: vldr [[REG9:d[0-9]+]], [r0]
101; CHECK: vstr [[REG9]], [r1]
102; CHECK: adds r1, #6
103; CHECK: adds r0, #6
104; CHECK: vld1.16
105; CHECK: vst1.16
106; CHECK-T1-LABEL: t6:
107; CHECK-T1: movs [[TREG5:r[0-9]]],
108; CHECK-T1: strh [[TREG5]],
109; CHECK-T1: ldr [[TREG6:r[0-9]]],
110; CHECK-T1: str [[TREG6]]
111  call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i32 1, i1 false)
112  ret void
113}
114
115%struct.Foo = type { i32, i32, i32, i32 }
116
117define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
118entry:
119; CHECK-LABEL: t7:
120; CHECK: vld1.32
121; CHECK: vst1.32
122; CHECK-T1-LABEL: t7:
123; CHECK-T1: ldr
124; CHECK-T1: str
125  %0 = bitcast %struct.Foo* %a to i8*
126  %1 = bitcast %struct.Foo* %b to i8*
127  tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false)
128  ret void
129}
130
131declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
132declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
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