source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/neon_ld1.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 998 bytes
Line 
1; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+neon %s -o - | FileCheck %s
2
3; CHECK: t1
4; CHECK: vldr d
5; CHECK: vldr d
6; CHECK: vadd.i16 d
7; CHECK: vstr d
8define void @t1(<2 x i32>* %r, <4 x i16>* %a, <4 x i16>* %b) nounwind {
9entry:
10        %0 = load <4 x i16>, <4 x i16>* %a, align 8             ; <<4 x i16>> [#uses=1]
11        %1 = load <4 x i16>, <4 x i16>* %b, align 8             ; <<4 x i16>> [#uses=1]
12        %2 = add <4 x i16> %0, %1               ; <<4 x i16>> [#uses=1]
13        %3 = bitcast <4 x i16> %2 to <2 x i32>          ; <<2 x i32>> [#uses=1]
14        store <2 x i32> %3, <2 x i32>* %r, align 8
15        ret void
16}
17
18; CHECK: t2
19; CHECK: vldr d
20; CHECK: vldr d
21; CHECK: vsub.i16 d
22; CHECK: vmov r0, r1, d
23define <2 x i32> @t2(<4 x i16>* %a, <4 x i16>* %b) nounwind readonly {
24entry:
25        %0 = load <4 x i16>, <4 x i16>* %a, align 8             ; <<4 x i16>> [#uses=1]
26        %1 = load <4 x i16>, <4 x i16>* %b, align 8             ; <<4 x i16>> [#uses=1]
27        %2 = sub <4 x i16> %0, %1               ; <<4 x i16>> [#uses=1]
28        %3 = bitcast <4 x i16> %2 to <2 x i32>          ; <<2 x i32>> [#uses=1]
29        ret <2 x i32> %3
30}
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