source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/ARM/vst4.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 5.9 KB
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1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
2
3define void @vst4i8(i8* %A, <8 x i8>* %B) nounwind {
4;CHECK-LABEL: vst4i8:
5;Check the alignment value.  Max for this instruction is 256 bits:
6;CHECK: vst4.8 {d16, d17, d18, d19}, [r0:64]
7        %tmp1 = load <8 x i8>, <8 x i8>* %B
8        call void @llvm.arm.neon.vst4.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 8)
9        ret void
10}
11
12;Check for a post-increment updating store with register increment.
13define void @vst4i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind {
14;CHECK-LABEL: vst4i8_update:
15;CHECK: vst4.8 {d16, d17, d18, d19}, [r1:128], r2
16        %A = load i8*, i8** %ptr
17        %tmp1 = load <8 x i8>, <8 x i8>* %B
18        call void @llvm.arm.neon.vst4.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 16)
19        %tmp2 = getelementptr i8, i8* %A, i32 %inc
20        store i8* %tmp2, i8** %ptr
21        ret void
22}
23
24define void @vst4i16(i16* %A, <4 x i16>* %B) nounwind {
25;CHECK-LABEL: vst4i16:
26;Check the alignment value.  Max for this instruction is 256 bits:
27;CHECK: vst4.16 {d16, d17, d18, d19}, [r0:128]
28        %tmp0 = bitcast i16* %A to i8*
29        %tmp1 = load <4 x i16>, <4 x i16>* %B
30        call void @llvm.arm.neon.vst4.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 16)
31        ret void
32}
33
34define void @vst4i32(i32* %A, <2 x i32>* %B) nounwind {
35;CHECK-LABEL: vst4i32:
36;Check the alignment value.  Max for this instruction is 256 bits:
37;CHECK: vst4.32 {d16, d17, d18, d19}, [r0:256]
38        %tmp0 = bitcast i32* %A to i8*
39        %tmp1 = load <2 x i32>, <2 x i32>* %B
40        call void @llvm.arm.neon.vst4.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 32)
41        ret void
42}
43
44define void @vst4f(float* %A, <2 x float>* %B) nounwind {
45;CHECK-LABEL: vst4f:
46;CHECK: vst4.32
47        %tmp0 = bitcast float* %A to i8*
48        %tmp1 = load <2 x float>, <2 x float>* %B
49        call void @llvm.arm.neon.vst4.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1)
50        ret void
51}
52
53define void @vst4i64(i64* %A, <1 x i64>* %B) nounwind {
54;CHECK-LABEL: vst4i64:
55;Check the alignment value.  Max for this instruction is 256 bits:
56;CHECK: vst1.64 {d16, d17, d18, d19}, [r0:256]
57        %tmp0 = bitcast i64* %A to i8*
58        %tmp1 = load <1 x i64>, <1 x i64>* %B
59        call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 64)
60        ret void
61}
62
63define void @vst4i64_update(i64** %ptr, <1 x i64>* %B) nounwind {
64;CHECK-LABEL: vst4i64_update:
65;CHECK: vst1.64 {d16, d17, d18, d19}, [r1]!
66        %A = load i64*, i64** %ptr
67        %tmp0 = bitcast i64* %A to i8*
68        %tmp1 = load <1 x i64>, <1 x i64>* %B
69        call void @llvm.arm.neon.vst4.p0i8.v1i64(i8* %tmp0, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, <1 x i64> %tmp1, i32 1)
70        %tmp2 = getelementptr i64, i64* %A, i32 4
71        store i64* %tmp2, i64** %ptr
72        ret void
73}
74
75define void @vst4Qi8(i8* %A, <16 x i8>* %B) nounwind {
76;CHECK-LABEL: vst4Qi8:
77;Check the alignment value.  Max for this instruction is 256 bits:
78;CHECK: vst4.8 {d16, d18, d20, d22}, [r0:256]!
79;CHECK: vst4.8 {d17, d19, d21, d23}, [r0:256]
80        %tmp1 = load <16 x i8>, <16 x i8>* %B
81        call void @llvm.arm.neon.vst4.p0i8.v16i8(i8* %A, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, <16 x i8> %tmp1, i32 64)
82        ret void
83}
84
85define void @vst4Qi16(i16* %A, <8 x i16>* %B) nounwind {
86;CHECK-LABEL: vst4Qi16:
87;Check for no alignment specifier.
88;CHECK: vst4.16 {d16, d18, d20, d22}, [r0]!
89;CHECK: vst4.16 {d17, d19, d21, d23}, [r0]
90        %tmp0 = bitcast i16* %A to i8*
91        %tmp1 = load <8 x i16>, <8 x i16>* %B
92        call void @llvm.arm.neon.vst4.p0i8.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1)
93        ret void
94}
95
96define void @vst4Qi32(i32* %A, <4 x i32>* %B) nounwind {
97;CHECK-LABEL: vst4Qi32:
98;CHECK: vst4.32
99;CHECK: vst4.32
100        %tmp0 = bitcast i32* %A to i8*
101        %tmp1 = load <4 x i32>, <4 x i32>* %B
102        call void @llvm.arm.neon.vst4.p0i8.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1)
103        ret void
104}
105
106define void @vst4Qf(float* %A, <4 x float>* %B) nounwind {
107;CHECK-LABEL: vst4Qf:
108;CHECK: vst4.32
109;CHECK: vst4.32
110        %tmp0 = bitcast float* %A to i8*
111        %tmp1 = load <4 x float>, <4 x float>* %B
112        call void @llvm.arm.neon.vst4.p0i8.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
113        ret void
114}
115
116;Check for a post-increment updating store.
117define void @vst4Qf_update(float** %ptr, <4 x float>* %B) nounwind {
118;CHECK-LABEL: vst4Qf_update:
119;CHECK: vst4.32 {d16, d18, d20, d22}, [r1]!
120;CHECK: vst4.32 {d17, d19, d21, d23}, [r1]!
121        %A = load float*, float** %ptr
122        %tmp0 = bitcast float* %A to i8*
123        %tmp1 = load <4 x float>, <4 x float>* %B
124        call void @llvm.arm.neon.vst4.p0i8.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1)
125        %tmp2 = getelementptr float, float* %A, i32 16
126        store float* %tmp2, float** %ptr
127        ret void
128}
129
130declare void @llvm.arm.neon.vst4.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32) nounwind
131declare void @llvm.arm.neon.vst4.p0i8.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32) nounwind
132declare void @llvm.arm.neon.vst4.p0i8.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind
133declare void @llvm.arm.neon.vst4.p0i8.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32) nounwind
134declare void @llvm.arm.neon.vst4.p0i8.v1i64(i8*, <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64>, i32) nounwind
135
136declare void @llvm.arm.neon.vst4.p0i8.v16i8(i8*, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, i32) nounwind
137declare void @llvm.arm.neon.vst4.p0i8.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32) nounwind
138declare void @llvm.arm.neon.vst4.p0i8.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind
139declare void @llvm.arm.neon.vst4.p0i8.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32) nounwind
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