source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/BPF/cc_args.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.6 KB
Line 
1; RUN: llc < %s -march=bpfel -show-mc-encoding | FileCheck %s
2
3define void @test() #0 {
4entry:
5; CHECK: test:
6
7; CHECK: mov  r1, 123 # encoding: [0xb7,0x01,0x00,0x00,0x7b,0x00,0x00,0x00]
8; CHECK: call f_i16
9  call void @f_i16(i16 123)
10
11; CHECK: mov  r1, 12345678 # encoding: [0xb7,0x01,0x00,0x00,0x4e,0x61,0xbc,0x00]
12; CHECK: call f_i32
13  call void @f_i32(i32 12345678)
14
15; CHECK: ld_64 r1, 72623859790382856 # encoding: [0x18,0x01,0x00,0x00,0x08,0x07,0x06,0x05,0x00,0x00,0x00,0x00,0x04,0x03,0x02,0x01]
16; CHECK: call f_i64
17  call void @f_i64(i64 72623859790382856)
18
19; CHECK: mov  r1, 1234
20; CHECK: mov  r2, 5678
21; CHECK: call f_i32_i32
22  call void @f_i32_i32(i32 1234, i32 5678)
23
24; CHECK: mov  r1, 2
25; CHECK: mov  r2, 3
26; CHECK: mov  r3, 4
27; CHECK: call f_i16_i32_i16
28  call void @f_i16_i32_i16(i16 2, i32 3, i16 4)
29
30; CHECK: mov  r1, 5
31; CHECK: ld_64 r2, 7262385979038285
32; CHECK: mov  r3, 6
33; CHECK: call f_i16_i64_i16
34  call void @f_i16_i64_i16(i16 5, i64 7262385979038285, i16 6)
35
36  ret void
37}
38
39@g_i16 = common global i16 0, align 2
40@g_i32 = common global i32 0, align 2
41@g_i64 = common global i64 0, align 4
42
43define void @f_i16(i16 %a) #0 {
44; CHECK: f_i16:
45; CHECK: sth 0(r2), r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
46  store volatile i16 %a, i16* @g_i16, align 2
47  ret void
48}
49
50define void @f_i32(i32 %a) #0 {
51; CHECK: f_i32:
52; CHECK: sth 0(r2), r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
53; CHECK: sth 2(r2), r1 # encoding: [0x6b,0x12,0x02,0x00,0x00,0x00,0x00,0x00]
54  store volatile i32 %a, i32* @g_i32, align 2
55  ret void
56}
57
58define void @f_i64(i64 %a) #0 {
59; CHECK: f_i64:
60; CHECK: stw 0(r2), r1
61; CHECK: stw 4(r2), r1 # encoding: [0x63,0x12,0x04,0x00,0x00,0x00,0x00,0x00]
62  store volatile i64 %a, i64* @g_i64, align 2
63  ret void
64}
65
66define void @f_i32_i32(i32 %a, i32 %b) #0 {
67; CHECK: f_i32_i32:
68; CHECK: stw 0(r3), r1
69  store volatile i32 %a, i32* @g_i32, align 4
70; CHECK: stw 0(r3), r2
71  store volatile i32 %b, i32* @g_i32, align 4
72  ret void
73}
74
75define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
76; CHECK: f_i16_i32_i16:
77; CHECK: sth 0(r4), r1
78  store volatile i16 %a, i16* @g_i16, align 2
79; CHECK: stw 0(r1), r2
80  store volatile i32 %b, i32* @g_i32, align 4
81; CHECK: sth 0(r4), r3
82  store volatile i16 %c, i16* @g_i16, align 2
83  ret void
84}
85
86define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
87; CHECK: f_i16_i64_i16:
88; CHECK: sth 0(r4), r1
89  store volatile i16 %a, i16* @g_i16, align 2
90; CHECK: std 0(r1), r2 # encoding: [0x7b,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
91  store volatile i64 %b, i64* @g_i64, align 8
92; CHECK: sth 0(r4), r3
93  store volatile i16 %c, i16* @g_i16, align 2
94  ret void
95}
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