source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/BPF/shifts.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 2.9 KB
Line 
1; RUN: llc < %s -march=bpfel -show-mc-encoding | FileCheck %s
2
3define zeroext i8 @lshr8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
4entry:
5; CHECK-LABEL: lshr8:
6; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
7  %shr = lshr i8 %a, %cnt
8  ret i8 %shr
9}
10
11define signext i8 @ashr8(i8 signext %a, i8 zeroext %cnt) nounwind readnone {
12entry:
13; CHECK-LABEL: ashr8:
14; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
15  %shr = ashr i8 %a, %cnt
16  ret i8 %shr
17}
18
19define zeroext i8 @shl8(i8 zeroext %a, i8 zeroext %cnt) nounwind readnone {
20entry:
21; CHECK: shl8
22; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
23  %shl = shl i8 %a, %cnt
24  ret i8 %shl
25}
26
27define zeroext i16 @lshr16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
28entry:
29; CHECK-LABEL: lshr16:
30; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
31  %shr = lshr i16 %a, %cnt
32  ret i16 %shr
33}
34
35define signext i16 @ashr16(i16 signext %a, i16 zeroext %cnt) nounwind readnone {
36entry:
37; CHECK-LABEL: ashr16:
38; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
39  %shr = ashr i16 %a, %cnt
40  ret i16 %shr
41}
42
43define zeroext i16 @shl16(i16 zeroext %a, i16 zeroext %cnt) nounwind readnone {
44entry:
45; CHECK-LABEL: shl16:
46; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
47  %shl = shl i16 %a, %cnt
48  ret i16 %shl
49}
50
51define zeroext i32 @lshr32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone {
52entry:
53; CHECK-LABEL: lshr32:
54; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
55; CHECK: slli r1, 32 # encoding: [0x67,0x01,0x00,0x00,0x20,0x00,0x00,0x00]
56  %shr = lshr i32 %a, %cnt
57  ret i32 %shr
58}
59
60define signext i32 @ashr32(i32 signext %a, i32 zeroext %cnt) nounwind readnone {
61entry:
62; CHECK-LABEL: ashr32:
63; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
64  %shr = ashr i32 %a, %cnt
65  ret i32 %shr
66}
67
68define zeroext i32 @shl32(i32 zeroext %a, i32 zeroext %cnt) nounwind readnone {
69entry:
70; CHECK-LABEL: shl32:
71; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
72  %shl = shl i32 %a, %cnt
73  ret i32 %shl
74}
75
76define zeroext i64 @lshr64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone {
77entry:
78; CHECK-LABEL: lshr64:
79; CHECK: srl r1, r2 # encoding: [0x7f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
80  %shr = lshr i64 %a, %cnt
81  ret i64 %shr
82}
83
84define signext i64 @ashr64(i64 signext %a, i64 zeroext %cnt) nounwind readnone {
85entry:
86; CHECK-LABEL: ashr64:
87; CHECK: sra r1, r2 # encoding: [0xcf,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
88  %shr = ashr i64 %a, %cnt
89  ret i64 %shr
90}
91
92define zeroext i64 @shl64(i64 zeroext %a, i64 zeroext %cnt) nounwind readnone {
93entry:
94; CHECK-LABEL: shl64:
95; CHECK: sll r1, r2 # encoding: [0x6f,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
96; CHECK: mov r0, r1 # encoding: [0xbf,0x10,0x00,0x00,0x00,0x00,0x00,0x00]
97; CHECK: ret # encoding: [0x95,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
98  %shl = shl i64 %a, %cnt
99  ret i64 %shl
100}
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