source: icGREP/icgrep-devel/llvm-3.8.0.src/test/CodeGen/Hexagon/base-offset-addr.ll @ 5027

Last change on this file since 5027 was 5027, checked in by cameron, 3 years ago

Upgrade to llvm 3.8

File size: 621 bytes
Line 
1; RUN: llc -march=hexagon -enable-aa-sched-mi < %s
2; REQUIRES: asserts
3
4; Make sure the base is a register and not an address.
5
6define fastcc void @Get_lsp_pol(i32* nocapture %f) #0 {
7entry:
8  %f5 = alloca i32, align 4
9  %arrayidx103 = getelementptr inbounds i32, i32* %f, i32 4
10  store i32 0, i32* %arrayidx103, align 4
11  %f5.0.load185 = load volatile i32, i32* %f5, align 4
12  ret void
13}
14
15attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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