source: parabix-LLVM/llvm_git/CREDITS.TXT @ 4136

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1This file is a partial list of people who have contributed to the LLVM
2project.  If you have contributed a patch or made some other contribution to
3LLVM, please submit a patch to this file to add yourself, and it will be
4done!
5
6The list is sorted by surname and formatted to allow easy grepping and
7beautification by scripts.  The fields are: name (N), email (E), web-address
8(W), PGP key ID and fingerprint (P), description (D), snail-mail address
9(S), and (I) IRC handle.
10
11
12N: Vikram Adve
13E: vadve@cs.uiuc.edu
14W: http://www.cs.uiuc.edu/~vadve/
15D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
16
17N: Owen Anderson
18E: resistor@mac.com
19D: LCSSA pass and related LoopUnswitch work
20D: GVNPRE pass, DataLayout refactoring, random improvements
21
22N: Henrik Bach
23D: MingW Win32 API portability layer
24
25N: Aaron Ballman
26E: aaron@aaronballman.com
27D: __declspec attributes, Windows support, general bug fixing
28
29N: Nate Begeman
30E: natebegeman@mac.com
31D: PowerPC backend developer
32D: Target-independent code generator and analysis improvements
33
34N: Daniel Berlin
35E: dberlin@dberlin.org
36D: ET-Forest implementation.
37D: Sparse bitmap
38
39N: David Blaikie
40E: dblaikie@gmail.com
41D: General bug fixing/fit & finish, mostly in Clang
42
43N: Neil Booth
44E: neil@daikokuya.co.uk
45D: APFloat implementation.
46
47N: Misha Brukman
48E: brukman+llvm@uiuc.edu
49W: http://misha.brukman.net
50D: Portions of X86 and Sparc JIT compilers, PowerPC backend
51D: Incremental bitcode loader
52
53N: Cameron Buschardt
54E: buschard@uiuc.edu
55D: The `mem2reg' pass - promotes values stored in memory to registers
56
57N: Brendon Cahoon
58E: bcahoon@codeaurora.org
59D: Loop unrolling with run-time trip counts.
60
61N: Chandler Carruth
62E: chandlerc@gmail.com
63E: chandlerc@google.com
64D: Hashing algorithms and interfaces
65D: Inline cost analysis
66D: Machine block placement pass
67D: SROA
68
69N: Casey Carter
70E: ccarter@uiuc.edu
71D: Fixes to the Reassociation pass, various improvement patches
72
73N: Evan Cheng
74E: evan.cheng@apple.com
75D: ARM and X86 backends
76D: Instruction scheduler improvements
77D: Register allocator improvements
78D: Loop optimizer improvements
79D: Target-independent code generator improvements
80
81N: Dan Villiom Podlaski Christiansen
82E: danchr@gmail.com
83E: danchr@cs.au.dk
84W: http://villiom.dk
85D: LLVM Makefile improvements
86D: Clang diagnostic & driver tweaks
87S: Aarhus, Denmark
88
89N: Jeff Cohen
90E: jeffc@jolt-lang.org
91W: http://jolt-lang.org
92D: Native Win32 API portability layer
93
94N: John T. Criswell
95E: criswell@uiuc.edu
96D: Original Autoconf support, documentation improvements, bug fixes
97
98N: Anshuman Dasgupta
99E: adasgupt@codeaurora.org
100D: Deterministic finite automaton based infrastructure for VLIW packetization
101
102N: Stefanus Du Toit
103E: stefanus.du.toit@intel.com
104D: Bug fixes and minor improvements
105
106N: Rafael Avila de Espindola
107E: rafael.espindola@gmail.com
108D: The ARM backend
109
110N: Dave Estes
111E: cestes@codeaurora.org
112D: AArch64 machine description for Cortex-A53
113
114N: Alkis Evlogimenos
115E: alkis@evlogimenos.com
116D: Linear scan register allocator, many codegen improvements, Java frontend
117
118N: Hal Finkel
119E: hfinkel@anl.gov
120D: Basic-block autovectorization, PowerPC backend improvements
121
122N: Ryan Flynn
123E: pizza@parseerror.com
124D: Miscellaneous bug fixes
125
126N: Brian Gaeke
127E: gaeke@uiuc.edu
128W: http://www.students.uiuc.edu/~gaeke/
129D: Portions of X86 static and JIT compilers; initial SparcV8 backend
130D: Dynamic trace optimizer
131D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
132
133N: Nicolas Geoffray
134E: nicolas.geoffray@lip6.fr
135W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
136D: PPC backend fixes for Linux
137
138N: Louis Gerbarg
139E: lgg@apple.com
140D: Portions of the PowerPC backend
141
142N: Saem Ghani
143E: saemghani@gmail.com
144D: Callgraph class cleanups
145
146N: Mikhail Glushenkov
147E: foldr@codedgers.com
148D: Author of llvmc2
149
150N: Dan Gohman
151E: dan433584@gmail.com
152D: Miscellaneous bug fixes
153
154N: David Goodwin
155E: david@goodwinz.net
156D: Thumb-2 code generator
157
158N: David Greene
159E: greened@obbligato.org
160D: Miscellaneous bug fixes
161D: Register allocation refactoring
162
163N: Gabor Greif
164E: ggreif@gmail.com
165D: Improvements for space efficiency
166
167N: James Grosbach
168E: grosbach@apple.com
169I: grosbach
170D: SjLj exception handling support
171D: General fixes and improvements for the ARM back-end
172D: MCJIT
173D: ARM integrated assembler and assembly parser
174D: Led effort for the backend formerly known as ARM64
175
176N: Lang Hames
177E: lhames@gmail.com
178D: PBQP-based register allocator
179
180N: Gordon Henriksen
181E: gordonhenriksen@mac.com
182D: Pluggable GC support
183D: C interface
184D: Ocaml bindings
185
186N: Raul Fernandes Herbster
187E: raul@dsc.ufcg.edu.br
188D: JIT support for ARM
189
190N: Paolo Invernizzi
191E: arathorn@fastwebnet.it
192D: Visual C++ compatibility fixes
193
194N: Patrick Jenkins
195E: patjenk@wam.umd.edu
196D: Nightly Tester
197
198N: Dale Johannesen
199E: dalej@apple.com
200D: ARM constant islands improvements
201D: Tail merging improvements
202D: Rewrite X87 back end
203D: Use APFloat for floating point constants widely throughout compiler
204D: Implement X87 long double
205
206N: Brad Jones
207E: kungfoomaster@nondot.org
208D: Support for packed types
209
210N: Rod Kay
211E: rkay@auroraux.org
212D: Author of LLVM Ada bindings
213
214N: Eric Kidd
215W: http://randomhacks.net/
216D: llvm-config script
217
218N: Anton Korobeynikov
219E: asl@math.spbu.ru
220D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
221D: x86/linux PIC codegen, aliases, regparm/visibility attributes
222D: Switch lowering refactoring
223
224N: Sumant Kowshik
225E: kowshik@uiuc.edu
226D: Author of the original C backend
227
228N: Benjamin Kramer
229E: benny.kra@gmail.com
230D: Miscellaneous bug fixes
231
232N: Sundeep Kushwaha
233E: sundeepk@codeaurora.org
234D: Implemented DFA-based target independent VLIW packetizer
235
236N: Christopher Lamb
237E: christopher.lamb@gmail.com
238D: aligned load/store support, parts of noalias and restrict support
239D: vreg subreg infrastructure, X86 codegen improvements based on subregs
240D: address spaces
241
242N: Jim Laskey
243E: jlaskey@apple.com
244D: Improvements to the PPC backend, instruction scheduling
245D: Debug and Dwarf implementation
246D: Auto upgrade mangler
247D: llvm-gcc4 svn wrangler
248
249N: Chris Lattner
250E: sabre@nondot.org
251W: http://nondot.org/~sabre/
252D: Primary architect of LLVM
253
254N: Tanya Lattner (Tanya Brethour)
255E: tonic@nondot.org
256W: http://nondot.org/~tonic/
257D: The initial llvm-ar tool, converted regression testsuite to dejagnu
258D: Modulo scheduling in the SparcV9 backend
259D: Release manager (1.7+)
260
261N: Sylvestre Ledru
262E: sylvestre@debian.org
263W: http://sylvestre.ledru.info/
264W: http://llvm.org/apt/
265D: Debian and Ubuntu packaging
266D: Continuous integration with jenkins
267
268N: Andrew Lenharth
269E: alenhar2@cs.uiuc.edu
270W: http://www.lenharth.org/~andrewl/
271D: Alpha backend
272D: Sampling based profiling
273
274N: Nick Lewycky
275E: nicholas@mxc.ca
276D: PredicateSimplifier pass
277
278N: Tony Linthicum, et. al.
279E: tlinth@codeaurora.org
280D: Backend for Qualcomm's Hexagon VLIW processor.
281
282N: Bruno Cardoso Lopes
283E: bruno.cardoso@gmail.com
284W: http://www.brunocardoso.org
285D: The Mips backend
286
287N: Duraid Madina
288E: duraid@octopus.com.au
289W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
290D: IA64 backend, BigBlock register allocator
291
292N: John McCall
293E: rjmccall@apple.com
294D: Clang semantic analysis and IR generation
295
296N: Michael McCracken
297E: michael.mccracken@gmail.com
298D: Line number support for llvmgcc
299
300N: Vladimir Merzliakov
301E: wanderer@rsu.ru
302D: Test suite fixes for FreeBSD
303
304N: Scott Michel
305E: scottm@aero.org
306D: Added STI Cell SPU backend.
307
308N: Kai Nacke
309E: kai@redstar.de
310D: Support for implicit TLS model used with MS VC runtime
311D: Dumping of Win64 EH structures
312
313N: Takumi Nakamura
314E: geek4civic@gmail.com
315E: chapuni@hf.rim.or.jp
316D: Cygwin and MinGW support.
317D: Win32 tweaks.
318S: Yokohama, Japan
319
320N: Edward O'Callaghan
321E: eocallaghan@auroraux.org
322W: http://www.auroraux.org
323D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
324D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
325D: and error clean ups.
326
327N: Morten Ofstad
328E: morten@hue.no
329D: Visual C++ compatibility fixes
330
331N: Jakob Stoklund Olesen
332E: stoklund@2pi.dk
333D: Machine code verifier
334D: Blackfin backend
335D: Fast register allocator
336D: Greedy register allocator
337
338N: Richard Osborne
339E: richard@xmos.com
340D: XCore backend
341
342N: Devang Patel
343E: dpatel@apple.com
344D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
345D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
346D: Optimizer improvements, Loop Index Split
347
348N: Ana Pazos
349E: apazos@codeaurora.org
350D: Fixes and improvements to the AArch64 backend
351
352N: Wesley Peck
353E: peckw@wesleypeck.com
354W: http://wesleypeck.com/
355D: MicroBlaze backend
356
357N: Francois Pichet
358E: pichet2000@gmail.com
359D: MSVC support
360
361N: Vladimir Prus
362W: http://vladimir_prus.blogspot.com
363E: ghost@cs.msu.su
364D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
365
366N: Kalle Raiskila
367E: kalle.rasikila@nokia.com
368D: Some bugfixes to CellSPU
369
370N: Xerxes Ranby
371E: xerxes@zafena.se
372D: Cmake dependency chain and various bug fixes
373
374N: Alex Rosenberg
375E: alexr@leftfield.org
376I: arosenberg
377D: ARM calling conventions rewrite, hard float support
378
379N: Chad Rosier
380E: mcrosier@codeaurora.org
381I: mcrosier
382D: AArch64 fast instruction selection pass
383D: Fixes and improvements to the ARM fast-isel pass
384D: Fixes and improvements to the AArch64 backend
385
386N: Nadav Rotem
387E: nrotem@apple.com
388D: X86 code generation improvements, Loop Vectorizer.
389
390N: Roman Samoilov
391E: roman@codedgers.com
392D: MSIL backend
393
394N: Duncan Sands
395E: baldrick@free.fr
396I: baldrick
397D: Ada support in llvm-gcc
398D: Dragonegg plugin
399D: Exception handling improvements
400D: Type legalizer rewrite
401
402N: Ruchira Sasanka
403E: sasanka@uiuc.edu
404D: Graph coloring register allocator for the Sparc64 backend
405
406N: Arnold Schwaighofer
407E: arnold.schwaighofer@gmail.com
408D: Tail call optimization for the x86 backend
409
410N: Shantonu Sen
411E: ssen@apple.com
412D: Miscellaneous bug fixes
413
414N: Anand Shukla
415E: ashukla@cs.uiuc.edu
416D: The `paths' pass
417
418N: Michael J. Spencer
419E: bigcheesegs@gmail.com
420D: Shepherding Windows COFF support into MC.
421D: Lots of Windows stuff.
422
423N: Reid Spencer
424E: rspencer@reidspencer.com
425W: http://reidspencer.com/
426D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
427
428N: Alp Toker
429E: alp@nuanti.com
430W: http://atoker.com/
431D: C++ frontend next generation standards implementation
432
433N: Craig Topper
434E: craig.topper@gmail.com
435D: X86 codegen and disassembler improvements. AVX2 support.
436
437N: Edwin Torok
438E: edwintorok@gmail.com
439D: Miscellaneous bug fixes
440
441N: Adam Treat
442E: manyoso@yahoo.com
443D: C++ bugs filed, and C++ front-end bug fixes.
444
445N: Lauro Ramos Venancio
446E: lauro.venancio@indt.org.br
447D: ARM backend improvements
448D: Thread Local Storage implementation
449
450N: Bill Wendling
451I: wendling
452E: isanbard@gmail.com
453D: Release manager, IR Linker, LTO
454D: Bunches of stuff
455
456N: Bob Wilson
457E: bob.wilson@acm.org
458D: Advanced SIMD (NEON) support in the ARM backend.
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