1 | /* Block Addition, Subtraction and Shifts with Carry |
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2 | Copyright (C) 2010, Robert D. Cameron |
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3 | Licensed to the public under the Open Software License 3.0. |
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4 | Licensed to International Characters Inc. |
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5 | under the Academic Free License version 3.0. |
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6 | */ |
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7 | #ifndef BLOCK_CARRY_H |
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8 | #define BLOCK_CARRY_H |
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9 | |
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10 | /*------------------------------------------------------------*/ |
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11 | #include "sse_simd.h" |
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12 | |
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13 | #define ADC_64 1 |
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14 | #define SIMD_CARRY 2 |
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15 | #define CARRY_STRATEGY ADC_64 |
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16 | |
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17 | #if (CARRY_STRATEGY == ADC_64) |
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18 | typedef uint64_t CarryType; |
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19 | |
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20 | #define Carry0 = 0 |
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21 | |
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22 | #define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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23 | __asm__ ("sahf\n\t" \ |
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24 | "adc %[e1], %[z1]\n\t" \ |
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25 | "adc %[e2], %[z2]\n\t" \ |
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26 | "lahf\n\t" \ |
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27 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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28 | : "[z1]" (x1), "[z2]" (x2), \ |
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29 | [e1] "r" (y1), [e2] "r" (y2), \ |
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30 | "[carryflag]" (carry) \ |
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31 | : "cc") |
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32 | |
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33 | #define adc128(first, second, carry, sum) \ |
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34 | do\ |
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35 | {\ |
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36 | union {__m128i bitblock;\ |
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37 | uint64_t int64[2];} rslt;\ |
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38 | \ |
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39 | union {__m128i bitblock;\ |
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40 | uint64_t int64[2];} x;\ |
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41 | \ |
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42 | union {__m128i bitblock;\ |
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43 | uint64_t int64[2];} y;\ |
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44 | \ |
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45 | x.bitblock = first;\ |
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46 | y.bitblock = second;\ |
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47 | \ |
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48 | double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\ |
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49 | sum = rslt.bitblock;\ |
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50 | }while(0) |
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51 | |
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52 | #define advance_with_carry(cursor, carry, rslt)\ |
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53 | do{\ |
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54 | union {__m128i bitblock;\ |
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55 | uint64_t int64[2];} z;\ |
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56 | \ |
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57 | union {__m128i bitblock;\ |
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58 | uint64_t int64[2];} x;\ |
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59 | \ |
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60 | x.bitblock = cursor;\ |
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61 | \ |
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62 | double_int64_adc(x.int64[0], x.int64[1], x.int64[0], x.int64[1], z.int64[0], z.int64[1], carry);\ |
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63 | rslt = z.bitblock;\ |
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64 | }while(0) |
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65 | |
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66 | #define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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67 | __asm__ ("sahf\n\t" \ |
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68 | "sbb %[e1], %[z1]\n\t" \ |
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69 | "sbb %[e2], %[z2]\n\t" \ |
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70 | "lahf\n\t" \ |
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71 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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72 | : "[z1]" (x1), "[z2]" (x2), \ |
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73 | [e1] "r" (y1), [e2] "r" (y2), \ |
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74 | "[carryflag]" (carry) \ |
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75 | : "cc") |
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76 | |
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77 | #define sbb128(first, second, carry, sum) \ |
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78 | do\ |
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79 | { union {__m128i bitblock;\ |
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80 | uint64_t int64[2];} rslt;\ |
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81 | \ |
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82 | union {__m128i bitblock;\ |
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83 | uint64_t int64[2];} x;\ |
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84 | \ |
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85 | union {__m128i bitblock;\ |
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86 | uint64_t int64[2];} y;\ |
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87 | \ |
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88 | x.bitblock = first;\ |
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89 | y.bitblock = second;\ |
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90 | \ |
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91 | double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \ |
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92 | rslt.int64[0], rslt.int64[1], carry);\ |
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93 | sum = rslt.bitblock;\ |
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94 | }while(0) |
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95 | |
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96 | #endif |
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97 | |
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98 | #if (CARRY_STRATEGY == SIMD_CARRY) |
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99 | |
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100 | #typedef SIMD_type CarryType; |
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101 | |
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102 | #define Carry0 simd_const_1(0) |
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103 | |
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104 | #define adc128(x, y, carry, sum) \ |
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105 | do{ \ |
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106 | SIMD_type gen = simd_and(x, y); \ |
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107 | SIMD_type prop = simd_or(x, y); \ |
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108 | SIMD_type partial = simd_add_64(simd_add_64(x, y), carry); \ |
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109 | SIMD_type c1 = sisd_slli(simd_srli_64(simd_or(gen, simd_andc(prop, partial)), 63), 64); \ |
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110 | sum = simd_add_64(c1, partial); \ |
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111 | carry = sisd_srli(simd_or(gen, simd_andc(prop, sum)), 127); \ |
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112 | } while(0) |
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113 | |
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114 | |
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115 | #define sbb128(x, y, borrow, difference) \ |
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116 | do {\ |
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117 | SIMD_type gen = simd_andc(y, x); \ |
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118 | SIMD_type prop = simd_not(simd_xor(x, y)); \ |
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119 | SIMD_type partial = simd_sub_64(simd_sub_64(x, y), borrow); \ |
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120 | SIMD_type b1 = sisd_slli(simd_srli_64(simd_or(gen, simd_and(prop, partial)), 63), 64); \ |
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121 | difference = simd_sub_64(partial, b1); \ |
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122 | borrow = sisd_srli(simd_or(gen, simd_and(prop, difference)), 127); \ |
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123 | }while(0) |
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124 | |
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125 | |
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126 | #define advance_with_carry(cursor, carry, rslt)\ |
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127 | do{\ |
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128 | SIMD_type shift_out = simd_srli_64(cursor, 63);\ |
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129 | SIMD_type low_bits = simd_mergel_64(shift_out, carry);\ |
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130 | carry = sisd_srli(shift_out, 64);\ |
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131 | rslt = simd_or(simd_add_64(cursor, cursor), low_bits);\ |
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132 | }while(0) |
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133 | |
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134 | #endif |
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135 | #endif |
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136 | |
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137 | |
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