source: trunk/lib/avx_simd.h @ 962

Last change on this file since 962 was 962, checked in by cameron, 9 years ago

AVX implementations

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1/*  Idealized SIMD Operations with SSE versions
2    Copyright (C) 2006, 2007, 2008, Robert D. Cameron
3    Licensed to the public under the Open Software License 3.0.
4    Licensed to International Characters Inc.
5       under the Academic Free License version 3.0.
6*/
7
8#ifndef AVX_SIMD_H
9#define AVX_SIMD_H
10
11#include <stdio.h>
12
13#warning compiling avx_simd.h
14
15/*------------------------------------------------------------*/
16
17#include <stdint.h>
18
19#ifdef _MSC_VER
20#define LITTLE_ENDIAN 1234
21#define BIG_ENDIAN 4321
22#define BYTE_ORDER LITTLE_ENDIAN
23#endif
24
25#include <immintrin.h>
26typedef __m256 SIMD_type;
27/*------------------------------------------------------------*/
28
29/* Prints the SIMD register representation of a SIMD value. */
30static void print_simd_register(const char * var_name, SIMD_type v);
31
32
33
34#define simd_hi128(x) \
35        ((__m128i)(_mm256_extractf128_ps(x, 1)))
36
37        //(_mm256_permute2f128_ps(x, x, 128 + 3))
38       
39#define simd_lo128(x) \
40        ((__m128i) _mm256_castps256_ps128(x))
41
42#define simd_lotohi128(x) \
43        _mm256_permute2f128_ps(x, x, 0 + 8)
44       
45#define simd_combine256(x, y) \
46   (_mm256_insertf128_ps(_mm256_castps128_ps256((__m128) y), (__m128) x, 1))
47   //(_mm256_permute2f128_ps(_mm256_castps128_ps256((__m128) x), _mm256_castps128_ps256((__m128) y), 2))
48       
49#define simd_op256(op128, x, y) \
50  simd_combine256(op128(simd_hi128(x), simd_hi128(y)), op128(simd_lo128(x), simd_lo128(y)))
51
52#define simd_unaryop256(op128, x, y) \
53  simd_combine256(op128(simd_hi128(x), y), op128(simd_lo128(x), y))
54 
55/* I. SIMD bitwise logical operations */
56
57#define simd_or(b1, b2) _mm256_or_ps(b1, b2)
58#define simd_and(b1, b2) _mm256_and_ps(b1, b2)
59#define simd_xor(b1, b2) _mm256_xor_ps(b1, b2)
60#define simd_andc(b1, b2) _mm256_andnot_ps(b2, b1)
61#define simd_if(cond, then_val, else_val) \
62  simd_or(simd_and(then_val, cond), simd_andc(else_val, cond))
63#define simd_not(b) (simd_xor(b, ((SIMD_type)_mm256_set1_epi32(0xFFFFFFFF))))
64#define simd_nor(a,b) (simd_not(simd_or(a,b)))
65
66/*  Specific constants. */
67#define sisd_low_bit_mask ((SIMD_type) _mm256_set_epi32(0, 0, 0, 0, 0, 0, 0, 0x00000001))
68#define sisd_high_bit_mask ((SIMD_type) _mm256_set_epi32(0x80000000, 0, 0, 0, 0, 0, 0, 0))
69#define simd_himask_2 ((SIMD_type) _mm256_set1_epi32(0xAAAAAAAA))
70#define simd_himask_4 ((SIMD_type) _mm256_set1_epi32(0xCCCCCCCC))
71#define simd_himask_8 ((SIMD_type) _mm256_set1_epi32(0xF0F0F0F0))
72
73/* Little-endian */
74#define simd_himask_16 ((SIMD_type) _mm256_set1_epi32(0xFF00FF00))
75//#define simd_himask_16_128 ((SIMD_type) _mm128_set1_epi32(0xFF00FF00))
76#define simd_himask_32 ((SIMD_type) _mm256_set1_epi32(0xFFFF0000))
77
78#define simd_lomask_64 ((SIMD_type) _mm256_set_epi32(0, -1, 0, -1, 0, -1, 0, -1))
79#define simd_himask_64 ((SIMD_type) _mm256_set_epi32(-1, 0, -1, 0, -1, 0, -1, 0))
80
81#define simd_lomask_128 ((SIMD_type) _mm256_set_epi32(0, 0, -1, -1, 0, 0,-1, -1))
82#define simd_himask_128 ((SIMD_type) _mm256_set_epi32(-1,-1, 0, 0,-1,-1, 0, 0))
83
84#define simd_himask_256 ((SIMD_type) _mm256_set_epi32(-1,-1,-1,-1, 0, 0, 0, 0))
85#define simd_lomask_256 ((SIMD_type) _mm256_set_epi32(0, 0, 0, 0,-1,-1,-1,-1))
86
87/* Idealized operations with direct implementation by built-in
88   operations for various target architectures. */
89
90#define simd_add_8(a, b) simd_op256(_mm_add_epi8, a, b)
91#define simd_add_16(a, b) simd_op256(_mm_add_epi16, a, b)
92#define simd_add_32(a, b) simd_op256(_mm_add_epi32, a, b)
93#define simd_add_64(a, b) simd_op256(_mm_add_epi64, a, b)
94
95#define simd_sub_8(a, b) simd_op256(_mm_sub_epi8, a, b)
96#define simd_sub_16(a, b) simd_op256(_mm_sub_epi16, a, b)
97#define simd_sub_32(a, b) simd_op256(_mm_sub_epi32, a, b)
98#define simd_sub_64(a, b) simd_op256(_mm_sub_epi64, a, b)
99
100#define simd_mult_16(a, b) simd_op256(_mm_mullo_epi16, a, b)
101
102#define simd_slli_16(r, shft) simd_unaryop256(_mm_slli_epi16, r, shft)
103#define simd_srli_16(r, shft) simd_unaryop256(_mm_srli_epi16, r, shft)
104#define simd_srai_16(r, shft) simd_unaryop256(_mm_srai_epi16, r, shft)
105
106#define simd_slli_32(r, shft) simd_unaryop256(_mm_slli_epi32, r, shft)
107#define simd_srli_32(r, shft) simd_unaryop256(_mm_srli_epi32, r, shft)
108#define simd_srai_32(r, shft) simd_unaryop256(_mm_srai_epi32, r, shft)
109
110#define simd_slli_64(r, shft) simd_unaryop256(_mm_slli_epi64, r, shft)
111#define simd_srli_64(r, shft) simd_unaryop256(_mm_srli_epi64, r, shft)
112
113#define simd_sll_64(r, shft_reg) simd_op256(_mm_sll_epi64, r, shft_reg)
114#define simd_srl_64(r, shft_reg) simd_op256(_mm_srl_epi64, r, shft_reg)
115
116#define packop256(packop128, x, y) \
117  simd_combine256(packop128(simd_lo128(x), simd_hi128(x)), packop128(simd_lo128(y), simd_hi128(y)))
118
119#define simd_packus_16(a, b) \
120        packop256(_mm_packus_epi16, a, b)
121       
122#define simd_pack_16(a, b) \
123        packop256(_mm_packus_epi16, \
124                simd_andc(a, simd_himask_16), \
125                simd_andc(b, simd_himask_16))
126 
127#define simd_mergeh_8(a, b) simd_op256(_mm_unpackhi_epi8, b, a)
128#define simd_mergeh_16(a, b) simd_op256(_mm_unpackhi_epi16, b, a)
129#define simd_mergeh_32(a, b) simd_op256(_mm_unpackhi_epi32, b, a)
130#define simd_mergeh_64(a, b) simd_op256(_mm_unpackhi_epi64, b, a)
131//_mm256_unpackhi_ps
132
133#define simd_mergel_8(a, b) simd_op256(_mm_unpacklo_epi8, b, a)
134#define simd_mergel_16(a, b) simd_op256(_mm_unpacklo_epi16, b, a)
135#define simd_mergel_32(a, b) simd_op256(_mm_unpacklo_epi32, b, a)
136#define simd_mergel_64(a, b) simd_op256(_mm_unpacklo_epi64, b, a)
137
138#define simd_eq_8(a, b) simd_op256(_mm_cmpeq_epi8, a, b)
139#define simd_eq_16(a, b) simd_op256(_mm_cmpeq_epi16, a, b)
140#define simd_eq_32(a, b) simd_op256(_mm_cmpeq_epi32, a, b)
141
142#define simd_max_8(a, b) simd_op256(_mm_max_epu8, a, b)
143
144#define _avx_mm_slli_128(r, shft) ((SIMD_type)simd_unaryop256(_mm_slli_si128, (r), shft))
145#define _avx_mm_srli_128(r, shft) ((SIMD_type)simd_unaryop256(_mm_srli_si128, (r), shft))
146
147#define simd_slli_128(r, shft) \
148  ((shft) % 8 == 0 ? _avx_mm_slli_128(r, (shft) / 8) : \
149   (shft) >= 64 ? simd_slli_64(_avx_mm_slli_128(r, 8), (shft) - 64) : \
150   simd_or(simd_slli_64(r, shft), _avx_mm_slli_128(simd_srli_64(r, 64-(shft)), 8)))
151
152#define simd_srli_128(r, shft) \
153  ((shft) % 8 == 0 ? _avx_mm_srli_128(r, (shft)/8) : \
154   (shft) >= 64 ? simd_srli_64(_avx_mm_srli_128(r, 8), (shft) - 64) : \
155   simd_or(simd_srli_64(r, shft), _avx_mm_srli_128(simd_slli_64(r, 64-(shft)), 8)))
156
157#define simd_slli_256(r, shft) \
158  simd_or(simd_slli_128(r, shft), simd_lotohi128(simd_srli_128(r, 128 - (shft))))
159
160#define simd_srli_256(r, shft) \
161  simd_or(simd_srli_128(r, shft), simd_slli_128((SIMD_type) _mm256_castsi128_si256(simd_lo128(r)), 128 - (shft)))
162
163#define simd128_slli_128(r, shft) \
164  ((shft) % 8 == 0 ? _mm_slli_si128(r, (shft)/8) : \
165   (shft) >= 64 ? _mm_slli_epi64(_mm_slli_si128(r, 8), (shft) - 64) : \
166   _mm_or_si128(_mm_slli_epi64(r, shft), _mm_slli_si128(_mm_srli_epi64(r, 64 - (shft)), 8)))
167
168#define simd128_srli_128(r, shft) \
169  ((shft) % 8 == 0 ? _mm_srli_si128(r, (shft)/8) : \
170   (shft) >= 64 ? _mm_srli_epi64(_mm_srli_si128(r, 8), (shft) - 64) : \
171   _mm_or_si128(_mm_srli_epi64(r, shft), _mm_srli_si128(_mm_slli_epi64(r, 64 - (shft)), 8)))
172
173/*
174
175static inline SIMD_type simd_slli_256(SIMD_type r, uint32_t shft)
176{
177        __m128i x = simd_hi128(r);
178        __m128i y = simd_lo128(r);
179       
180        return
181        simd_combine256(
182        _mm_or_si128(
183                simd128_slli_128(x, shft),
184                simd128_srli_128(y, (128 - shft))),
185        simd128_slli_128(y, shft));
186}
187
188static inline SIMD_type simd_srli_256(SIMD_type r, uint32_t shft)
189{
190        __m128i x = simd_lo128(r);
191        __m128i y = simd_hi128(r);
192
193        return
194        simd_combine256(
195        _mm_or_si128(
196                simd128_srli_128(x, shft),
197                simd128_slli_128(y, (128 - shft))),
198        simd128_srli_128(y, shft));
199}
200*/
201
202#define simd_sll_128(r, shft) \
203   simd_or(simd_sll_64(r, shft), \
204           simd_or(_mm_slli_si128(simd_sll_64(r, simd_sub_32(shft, sisd_from_int(64))), 8), \
205                   _mm_slli_si128(simd_srl_64(r, simd_sub_32(sisd_from_int(64), shft)), 8)))
206
207#define simd_srl_128(r, shft) \
208   simd_or(simd_srl_64(r, shft), \
209           simd_or(_mm_srli_si128(simd_srl_64(r, simd_sub_32(shft, sisd_from_int(64))), 8), \
210                   _mm_srli_si128(simd_sll_64(r, simd_sub_32(sisd_from_int(64), shft)), 8)))
211/*
212#define simd_sll_256(r, shft) \
213   simd_or(simd_sll_128(r, shft), \
214           simd_or(simd_slli_256(simd_sll_128(r, simd_sub_32(shft, sisd_from_int(128))), 16), \
215                   simd_slli_256(simd_srl_128(r, simd_sub_32(sisd_from_int(128), shft)), 16)))
216
217#define simd_srl_256(r, shft) \
218   simd_or(simd_srl_128(r, shft), \
219           simd_or(simd_srli_256(simd_srl_128(r, simd_sub_32(shft, sisd_from_int(128))), 16), \
220                   simd_srli_256(simd_sll_128(r, simd_sub_32(sisd_from_int(128), shft)), 16)))
221*/
222/*
223#define simd128_sll_128(r, shft) \
224   simd_or(simd_sll_64(r, shft), \
225           simd_or(_mm_slli_si128(simd_sll_64(r, simd_sub_32(shft, sisd_from_int(64))), 8), \
226                   _mm_slli_si128(simd_srl_64(r, simd_sub_32(sisd_from_int(64), shft)), 8)))
227
228#define simd128_srl_128(r, shft) \
229   simd_or(simd_srl_64(r, shft), \
230           simd_or(_mm_srli_si128(simd_srl_64(r, simd_sub_32(shft, _mm_srli_epi32(64))), 8), \
231                   _mm_srli_si128(simd_sll_64(r, simd_sub_32(sisd_from_int(64), shft)), 8)))
232
233#define simd_sll_64(r, shft_reg) _mm_sll_epi64(r, shft_reg)
234#define simd_srl_64(r, shft_reg) _mm_srl_epi64(r, shft_reg)
235*/
236
237
238
239static inline __m128i simd128_srl_128(__m128i r, __m128i shft)
240{
241  return
242  _mm_or_si128(_mm_srl_epi64(r, shft),
243        _mm_or_si128(_mm_srli_si128(_mm_srl_epi64(r, _mm_sub_epi32(shft, _mm_cvtsi32_si128(64))), 8),
244                     _mm_srli_si128(_mm_sll_epi64(r, _mm_sub_epi32(_mm_cvtsi32_si128(64), shft)), 8)));
245}
246
247static inline __m128i simd128_sll_128(__m128i r, __m128i shft)
248{
249  return
250  _mm_or_si128(_mm_sll_epi64(r, shft),
251        _mm_or_si128(_mm_slli_si128(_mm_sll_epi64(r, _mm_sub_epi32(shft, _mm_cvtsi32_si128(64))), 8),
252                     _mm_slli_si128(_mm_srl_epi64(r, _mm_sub_epi32(_mm_cvtsi32_si128(64), shft)), 8)));
253}
254
255static inline SIMD_type simd_sll_256(SIMD_type r, __m128i s)
256{
257        //__m128i s = simd_lo128(shft);
258        __m128i x = simd_hi128(r);
259        __m128i y = simd_lo128(r);
260
261        return
262        simd_combine256(
263           _mm_or_si128(
264                _mm_or_si128(simd128_sll_128(x, s), simd128_sll_128(y, _mm_sub_epi32(s, _mm_cvtsi32_si128(128)))),
265                simd128_srl_128(y, _mm_sub_epi32(_mm_cvtsi32_si128(128), s))),
266        simd128_sll_128(y, s));
267}
268
269static inline SIMD_type simd_srl_256(SIMD_type r, __m128i s)
270{
271        //__m128i s = simd_lo128(shft);
272        __m128i x = simd_lo128(r);
273        __m128i y = simd_hi128(r);
274
275        return
276        simd_combine256(
277           simd128_srl_128(y, s),
278           _mm_or_si128(
279                _mm_or_si128(simd128_srl_128(x, s), simd128_srl_128(y, _mm_sub_epi32(s, _mm_cvtsi32_si128(128)))),
280                simd128_sll_128(y, _mm_sub_epi32(_mm_cvtsi32_si128(128), s))));
281}
282
283#define sisd_sll(r, shft) simd_sll_256(r, simd_lo128(shft))
284#define sisd_srl(r, shft) simd_srl_256(r, simd_lo128(shft))
285#define sisd_slli(r, shft) simd_slli_256(r, shft)
286#define sisd_srli(r, shft) simd_srli_256(r, shft)
287#define sisd_add(a, b) simd_add_256(a, b)
288#define sisd_sub(a, b) simd_sub_256(a, b)
289
290#define sisd_store_aligned(r, addr) _mm256_store_ps(addr, r)
291#define sisd_store_unaligned(r, addr) _mm256_storeu_ps(addr, r)
292#define sisd_load_aligned(addr) ((SIMD_type)_mm256_load_si256((__m256i const *)addr))
293#define sisd_load_unaligned(addr) ((SIMD_type)_mm256_loadu_si256((__m256i const *)addr))
294
295
296#define simd_const_32(n) ((__m256)_mm256_set1_epi32(n))
297#define simd_const_16(n) ((__m256)_mm256_set1_epi16(n))
298#define simd_const_8(n) ((__m256)_mm256_set1_epi8(n))
299#define simd_const_4(n) ((__m256)_mm256_set1_epi8((n) << 4| (n)))
300#define simd_const_2(n) simd_const_4((n) << 2 | (n))
301#define simd_const_1(n) (n==0 ? simd_const_8(0): simd_const_8(-1))
302
303static inline
304SIMD_type simd_add_2(SIMD_type a, SIMD_type b)
305{
306         SIMD_type c1 = simd_xor(a,b);
307         SIMD_type borrow = simd_and(a,b);
308         SIMD_type c2 = simd_xor(c1,(sisd_slli(borrow,1)));
309         return simd_if(simd_himask_2,c2,c1);
310}
311
312#define simd_add_4(a, b)\
313        simd_if(simd_himask_8, simd_add_8(simd_and(a,simd_himask_8),simd_and(b,simd_himask_8))\
314        ,simd_add_8(simd_andc(a,simd_himask_8),simd_andc(b,simd_himask_8)))
315
316#define simd_srli_2(r, sh)\
317         simd_and(simd_srli_32(r,sh), simd_const_2(3>>sh))
318
319#define simd_srli_4(r, sh)\
320         simd_and(simd_srli_32(r,sh), simd_const_4(15>>sh))
321         
322#define simd_srli_8(r, sh)\
323         simd_and(simd_srli_32(r,sh), simd_const_8(255>>sh))
324
325#define simd_slli_2(r, sh)\
326         simd_and(simd_slli_32(r,sh), simd_const_2((3<<sh)&3))
327
328#define simd_slli_4(r, sh)\
329         simd_and(simd_slli_32(r,sh), simd_const_4((15<<sh)&15))
330         
331#define simd_slli_8(r, sh)\
332         simd_and(simd_slli_32(r,sh), simd_const_8((255<<sh) &255))
333
334#define simd_mergeh_4(a,b)\
335        simd_mergeh_8(simd_if(simd_himask_8,a,simd_srli_8(b,4)),\
336        simd_if(simd_himask_8,simd_slli_8(a,4),b))
337
338#define simd_mergel_4(a,b)\
339        simd_mergel_8(simd_if(simd_himask_8,a,simd_srli_8(b,4)),\
340        simd_if(simd_himask_8,simd_slli_8(a,4),b))
341
342#define simd_mergeh_2(a,b)\
343        simd_mergeh_4(simd_if(simd_himask_4,a,simd_srli_4(b,2)),\
344        simd_if(simd_himask_4,simd_slli_4(a,2),b))
345
346#define simd_mergel_2(a,b)\
347        simd_mergel_4(simd_if(simd_himask_4,a,simd_srli_4(b,2)),\
348        simd_if(simd_himask_4,simd_slli_4(a,2),b))
349
350#define simd_mergeh_1(a,b)\
351        simd_mergeh_2(simd_if(simd_himask_2,a,simd_srli_2(b,1)),\
352        simd_if(simd_himask_2,simd_slli_2(a,1),b))
353
354#define simd_mergel_1(a,b)\
355        simd_mergel_2(simd_if(simd_himask_2,a,simd_srli_2(b,1)),\
356        simd_if(simd_himask_2,simd_slli_2(a,1),b))
357
358#define sisd_from_int(n) _mm256_castsi256_ps(_mm256_castsi128_si256(_mm_cvtsi32_si128(n)))
359
360/*
361#define sisd_to_int(x) _mm_cvtsi128_si32(x)
362
363#define sisd_from_int(n) _mm_cvtsi32_si128(n)
364
365static inline int simd_all_true_8(SIMD_type v) {
366  return _mm_movemask_epi8(v) == 0xFFFF;
367}
368
369static inline int simd_any_true_8(SIMD_type v) {
370  return _mm_movemask_epi8(v) != 0;
371}
372
373static inline int simd_any_sign_bit_8(SIMD_type v) {
374  return _mm_movemask_epi8(v) != 0;
375}
376
377#define simd_movemask_8(v) _mm_movemask_epi8(v)
378
379#define simd_all_eq_8(v1, v2) simd_all_true_8(_mm_cmpeq_epi8(v1, v2))
380
381
382#define simd_all_le_8(v1, v2) \
383  simd_all_eq_8(simd_max_8(v1, v2), v2)
384
385#define simd_all_signed_gt_8(v1, v2) simd_all_true_8(_mm_cmpgt_epi8(v1, v2))
386
387#define simd_cmpgt_8(v1,v2) _mm_cmpgt_epi8(v1, v2)
388
389*/
390
391static inline int simd_movemask_8(SIMD_type v)
392{
393        __m128i x1 = simd_lo128(v);
394        __m128i y1 = simd_hi128(v);
395        return (_mm_movemask_epi8(x1) | (_mm_movemask_epi8(y1) << 16));
396}
397
398static inline int simd_all_eq_8(SIMD_type v1, SIMD_type v2)
399{
400        __m128i x1 = simd_hi128(v1);
401        __m128i y1 = simd_lo128(v1);
402
403        __m128i x2 = simd_hi128(v2);
404        __m128i y2 = simd_lo128(v2);
405
406        return ((_mm_movemask_epi8(_mm_cmpeq_epi8(x1, x2)) & _mm_movemask_epi8(_mm_cmpeq_epi8(y1, y2))) == 0xFFFF);
407}
408
409static inline int bitblock_has_bit(SIMD_type v) 
410{
411        return !_mm256_testz_si256((__m256i) v,(__m256i) v);
412}
413
414
415#define simd_pack_2(a,b)\
416        simd_pack_4(simd_if(simd_himask_2,sisd_srli(a,1),a),\
417        simd_if(simd_himask_2,sisd_srli(b,1),b))
418#define simd_pack_4(a,b)\
419        simd_pack_8(simd_if(simd_himask_4,sisd_srli(a,2),a),\
420        simd_if(simd_himask_4,sisd_srli(b,2),b))
421#define simd_pack_8(a,b)\
422        simd_pack_16(simd_if(simd_himask_8,sisd_srli(a,4),a),\
423        simd_if(simd_himask_8,sisd_srli(b,4),b))
424
425#ifndef simd_add_2_xx
426#define simd_add_2_xx(v1, v2) simd_add_2(v1, v2)
427#endif
428
429#ifndef simd_add_2_xl
430#define simd_add_2_xl(v1, v2) simd_add_2(v1, simd_andc(v2, simd_himask_2))
431#endif
432
433#ifndef simd_add_2_xh
434#define simd_add_2_xh(v1, v2) simd_add_2(v1, simd_srli_2(v2, 1))
435#endif
436
437#ifndef simd_add_2_lx
438#define simd_add_2_lx(v1, v2) simd_add_2(simd_andc(v1, simd_himask_2), v2)
439#endif
440
441#ifndef simd_add_2_ll
442#define simd_add_2_ll(v1, v2) simd_add_8(simd_andc(v1, simd_himask_2), simd_andc(v2, simd_himask_2))
443#endif
444
445#ifndef simd_add_2_lh
446#define simd_add_2_lh(v1, v2) simd_add_8(simd_andc(v1, simd_himask_2), simd_srli_2(v2, 1))
447#endif
448
449#ifndef simd_add_2_hx
450#define simd_add_2_hx(v1, v2) simd_add_2(simd_srli_2(v1, 1), v2)
451#endif
452
453#ifndef simd_add_2_hl
454#define simd_add_2_hl(v1, v2) simd_add_8(simd_srli_2(v1, 1), simd_andc(v2, simd_himask_2))
455#endif
456
457#ifndef simd_add_2_hh
458#define simd_add_2_hh(v1, v2) simd_add_8(simd_srli_2(v1, 1), simd_srli_2(v2, 1))
459#endif
460
461#ifndef simd_add_4_xx
462#define simd_add_4_xx(v1, v2) simd_add_4(v1, v2)
463#endif
464
465#ifndef simd_add_4_xl
466#define simd_add_4_xl(v1, v2) simd_add_4(v1, simd_andc(v2, simd_himask_4))
467#endif
468
469#ifndef simd_add_4_xh
470#define simd_add_4_xh(v1, v2) simd_add_4(v1, simd_srli_4(v2, 2))
471#endif
472
473#ifndef simd_add_4_lx
474#define simd_add_4_lx(v1, v2) simd_add_4(simd_andc(v1, simd_himask_4), v2)
475#endif
476
477#ifndef simd_add_4_ll
478#define simd_add_4_ll(v1, v2) simd_add_8(simd_andc(v1, simd_himask_4), simd_andc(v2, simd_himask_4))
479#endif
480
481#ifndef simd_add_4_lh
482#define simd_add_4_lh(v1, v2) simd_add_8(simd_andc(v1, simd_himask_4), simd_srli_4(v2, 2))
483#endif
484
485#ifndef simd_add_4_hx
486#define simd_add_4_hx(v1, v2) simd_add_4(simd_srli_4(v1, 2), v2)
487#endif
488
489#ifndef simd_add_4_hl
490#define simd_add_4_hl(v1, v2) simd_add_8(simd_srli_4(v1, 2), simd_andc(v2, simd_himask_4))
491#endif
492
493#ifndef simd_add_4_hh
494#define simd_add_4_hh(v1, v2) simd_add_8(simd_srli_4(v1, 2), simd_srli_4(v2, 2))
495#endif
496
497#ifndef simd_add_8_xx
498#define simd_add_8_xx(v1, v2) simd_add_8(v1, v2)
499#endif
500
501#ifndef simd_add_8_xl
502#define simd_add_8_xl(v1, v2) simd_add_8(v1, simd_andc(v2, simd_himask_8))
503#endif
504
505#ifndef simd_add_8_xh
506#define simd_add_8_xh(v1, v2) simd_add_8(v1, simd_srli_8(v2, 4))
507#endif
508
509#ifndef simd_add_8_lx
510#define simd_add_8_lx(v1, v2) simd_add_8(simd_andc(v1, simd_himask_8), v2)
511#endif
512
513#ifndef simd_add_8_ll
514#define simd_add_8_ll(v1, v2) simd_add_8(simd_andc(v1, simd_himask_8), simd_andc(v2, simd_himask_8))
515#endif
516
517#ifndef simd_add_8_lh
518#define simd_add_8_lh(v1, v2) simd_add_8(simd_andc(v1, simd_himask_8), simd_srli_8(v2, 4))
519#endif
520
521#ifndef simd_add_8_hx
522#define simd_add_8_hx(v1, v2) simd_add_8(simd_srli_8(v1, 4), v2)
523#endif
524
525#ifndef simd_add_8_hl
526#define simd_add_8_hl(v1, v2) simd_add_8(simd_srli_8(v1, 4), simd_andc(v2, simd_himask_8))
527#endif
528
529#ifndef simd_add_8_hh
530#define simd_add_8_hh(v1, v2) simd_add_8(simd_srli_8(v1, 4), simd_srli_8(v2, 4))
531#endif
532
533#ifndef simd_add_16_xx
534#define simd_add_16_xx(v1, v2) simd_add_16(v1, v2)
535#endif
536
537#ifndef simd_add_16_xl
538#define simd_add_16_xl(v1, v2) simd_add_16(v1, simd_andc(v2, simd_himask_16))
539#endif
540
541#ifndef simd_add_16_xh
542#define simd_add_16_xh(v1, v2) simd_add_16(v1, simd_srli_16(v2, 8))
543#endif
544
545#ifndef simd_add_16_lx
546#define simd_add_16_lx(v1, v2) simd_add_16(simd_andc(v1, simd_himask_16), v2)
547#endif
548
549#ifndef simd_add_16_ll
550#define simd_add_16_ll(v1, v2) simd_add_16(simd_andc(v1, simd_himask_16), simd_andc(v2, simd_himask_16))
551#endif
552
553#ifndef simd_add_16_lh
554#define simd_add_16_lh(v1, v2) simd_add_16(simd_andc(v1, simd_himask_16), simd_srli_16(v2, 8))
555#endif
556
557#ifndef simd_add_16_hx
558#define simd_add_16_hx(v1, v2) simd_add_16(simd_srli_16(v1, 8), v2)
559#endif
560
561#ifndef simd_add_16_hl
562#define simd_add_16_hl(v1, v2) simd_add_16(simd_srli_16(v1, 8), simd_andc(v2, simd_himask_16))
563#endif
564
565#ifndef simd_add_16_hh
566#define simd_add_16_hh(v1, v2) simd_add_16(simd_srli_16(v1, 8), simd_srli_16(v2, 8))
567#endif
568
569#ifndef simd_add_32_xx
570#define simd_add_32_xx(v1, v2) simd_add_32(v1, v2)
571#endif
572
573#ifndef simd_add_32_xl
574#define simd_add_32_xl(v1, v2) simd_add_32(v1, simd_andc(v2, simd_himask_32))
575#endif
576
577#ifndef simd_add_32_xh
578#define simd_add_32_xh(v1, v2) simd_add_32(v1, simd_srli_32(v2, 16))
579#endif
580
581#ifndef simd_add_32_lx
582#define simd_add_32_lx(v1, v2) simd_add_32(simd_andc(v1, simd_himask_32), v2)
583#endif
584
585#ifndef simd_add_32_ll
586#define simd_add_32_ll(v1, v2) simd_add_32(simd_andc(v1, simd_himask_32), simd_andc(v2, simd_himask_32))
587#endif
588
589#ifndef simd_add_32_lh
590#define simd_add_32_lh(v1, v2) simd_add_32(simd_andc(v1, simd_himask_32), simd_srli_32(v2, 16))
591#endif
592
593#ifndef simd_add_32_hx
594#define simd_add_32_hx(v1, v2) simd_add_32(simd_srli_32(v1, 16), v2)
595#endif
596
597#ifndef simd_add_32_hl
598#define simd_add_32_hl(v1, v2) simd_add_32(simd_srli_32(v1, 16), simd_andc(v2, simd_himask_32))
599#endif
600
601#ifndef simd_add_32_hh
602#define simd_add_32_hh(v1, v2) simd_add_32(simd_srli_32(v1, 16), simd_srli_32(v2, 16))
603#endif
604
605#ifndef simd_add_64_xx
606#define simd_add_64_xx(v1, v2) simd_add_64(v1, v2)
607#endif
608
609#ifndef simd_add_64_xl
610#define simd_add_64_xl(v1, v2) simd_add_64(v1, simd_andc(v2, simd_himask_64))
611#endif
612
613#ifndef simd_add_64_xh
614#define simd_add_64_xh(v1, v2) simd_add_64(v1, simd_srli_64(v2, 32))
615#endif
616
617#ifndef simd_add_64_lx
618#define simd_add_64_lx(v1, v2) simd_add_64(simd_andc(v1, simd_himask_64), v2)
619#endif
620
621#ifndef simd_add_64_ll
622#define simd_add_64_ll(v1, v2) simd_add_64(simd_andc(v1, simd_himask_64), simd_andc(v2, simd_himask_64))
623#endif
624
625#ifndef simd_add_64_lh
626#define simd_add_64_lh(v1, v2) simd_add_64(simd_andc(v1, simd_himask_64), simd_srli_64(v2, 32))
627#endif
628
629#ifndef simd_add_64_hx
630#define simd_add_64_hx(v1, v2) simd_add_64(simd_srli_64(v1, 32), v2)
631#endif
632
633#ifndef simd_add_64_hl
634#define simd_add_64_hl(v1, v2) simd_add_64(simd_srli_64(v1, 32), simd_andc(v2, simd_himask_64))
635#endif
636
637#ifndef simd_add_64_hh
638#define simd_add_64_hh(v1, v2) simd_add_64(simd_srli_64(v1, 32), simd_srli_64(v2, 32))
639#endif
640
641#ifndef simd_add_128_xx
642#define simd_add_128_xx(v1, v2) simd_add_128(v1, v2)
643#endif
644
645#ifndef simd_add_128_xl
646#define simd_add_128_xl(v1, v2) simd_add_128(v1, simd_andc(v2, simd_himask_128))
647#endif
648
649#ifndef simd_add_128_xhsimd_all_eq_8
650#define simd_add_128_xh(v1, v2) simd_add_128(v1, simd_srli_128(v2, 64))
651#endif
652
653#ifndef simd_add_128_lx
654#define simd_add_128_lx(v1, v2) simd_add_128(simd_andc(v1, simd_himask_128), v2)
655#endif
656
657#ifndef simd_add_128_ll
658#define simd_add_128_ll(v1, v2) simd_add_128(simd_andc(v1, simd_himask_128), simd_andc(v2, simd_himask_128))
659#endif
660
661#ifndef simd_add_128_lh
662#define simd_add_128_lh(v1, v2) simd_add_128(simd_andc(v1, simd_himask_128), simd_srli_128(v2, 64))
663#endif
664
665#ifndef simd_add_128_hx
666#define simd_add_128_hx(v1, v2) simd_add_128(simd_srli_128(v1, 64), v2)
667#endif
668
669#ifndef simd_add_128_hl
670#define simd_add_128_hl(v1, v2) simd_add_128(simd_srli_128(v1, 64), simd_andc(v2, simd_himask_128))
671#endif
672
673#ifndef simd_add_128_hh
674#define simd_add_128_hh(v1, v2) simd_add_128(simd_srli_128(v1, 64), simd_srli_128(v2, 64))
675#endif
676
677static inline SIMD_type simd_add_128(SIMD_type v1, SIMD_type v2) {
678        SIMD_type temp = simd_add_64(v1,v2);
679        SIMD_type carry_mask = simd_or(simd_and(v1, v2), simd_and(simd_xor(v1, v2), simd_not(temp)));
680        SIMD_type carry = simd_slli_128(simd_and(carry_mask, simd_lomask_128), 1);
681        return simd_if(simd_lomask_128, temp, simd_add_64(temp, carry));
682}
683
684#ifndef simd_pack_2_xx
685#define simd_pack_2_xx(v1, v2) simd_pack_2(v1, v2)
686#endif
687
688#ifndef simd_pack_2_xl
689#define simd_pack_2_xl(v1, v2) simd_pack_2(v1, v2)
690#endif
691
692#ifndef simd_pack_2_xh
693#define simd_pack_2_xh(v1, v2) simd_pack_2(v1, simd_srli_16(v2, 1))
694#endif
695
696#ifndef simd_pack_2_lx
697#define simd_pack_2_lx(v1, v2) simd_pack_2(v1, v2)
698#endif
699
700#ifndef simd_pack_2_ll
701#define simd_pack_2_ll(v1, v2) simd_pack_2(v1, v2)
702#endif
703
704#ifndef simd_pack_2_lh
705#define simd_pack_2_lh(v1, v2) simd_pack_2(v1, simd_srli_16(v2, 1))
706#endif
707
708#ifndef simd_pack_2_hx
709#define simd_pack_2_hx(v1, v2) simd_pack_2(simd_srli_16(v1, 1), v2)
710#endif
711
712#ifndef simd_pack_2_hl
713#define simd_pack_2_hl(v1, v2) simd_pack_2(simd_srli_16(v1, 1), v2)
714#endif
715
716#ifndef simd_pack_2_hh
717#define simd_pack_2_hh(v1, v2) simd_pack_2(simd_srli_16(v1, 1), simd_srli_16(v2, 1))
718#endif
719
720#ifndef simd_pack_4_xx
721#define simd_pack_4_xx(v1, v2) simd_pack_4(v1, v2)
722#endif
723
724#ifndef simd_pack_4_xl
725#define simd_pack_4_xl(v1, v2) simd_pack_4(v1, v2)
726#endif
727
728#ifndef simd_pack_4_xh
729#define simd_pack_4_xh(v1, v2) simd_pack_4(v1, simd_srli_16(v2, 2))
730#endif
731
732#ifndef simd_pack_4_lx
733#define simd_pack_4_lx(v1, v2) simd_pack_4(v1, v2)
734#endif
735
736#ifndef simd_pack_4_ll
737#define simd_pack_4_ll(v1, v2) simd_pack_4(v1, v2)
738#endif
739
740#ifndef simd_pack_4_lh
741#define simd_pack_4_lh(v1, v2) simd_pack_4(v1, simd_srli_16(v2, 2))
742#endif
743
744#ifndef simd_pack_4_hx
745#define simd_pack_4_hx(v1, v2) simd_pack_4(simd_srli_16(v1, 2), v2)
746#endif
747
748#ifndef simd_pack_4_hl
749#define simd_pack_4_hl(v1, v2) simd_pack_4(simd_srli_16(v1, 2), v2)
750#endif
751
752#ifndef simd_pack_4_hh
753#define simd_pack_4_hh(v1, v2) simd_pack_4(simd_srli_16(v1, 2), simd_srli_16(v2, 2))
754#endif
755
756#ifndef simd_pack_8_xx
757#define simd_pack_8_xx(v1, v2) simd_pack_8(v1, v2)
758#endif
759
760#ifndef simd_pack_8_xl
761#define simd_pack_8_xl(v1, v2) simd_pack_8(v1, v2)
762#endif
763
764#ifndef simd_pack_8_xh
765#define simd_pack_8_xh(v1, v2) simd_pack_8(v1, simd_srli_16(v2, 4))
766#endif
767
768#ifndef simd_pack_8_lx
769#define simd_pack_8_lx(v1, v2) simd_pack_8(v1, v2)
770#endif
771
772#ifndef simd_pack_8_ll
773#define simd_pack_8_ll(v1, v2) simd_pack_8(v1, v2)
774#endif
775
776#ifndef simd_pack_8_lh
777#define simd_pack_8_lh(v1, v2) simd_pack_8(v1, simd_srli_16(v2, 4))
778#endif
779
780#ifndef simd_pack_8_hx
781#define simd_pack_8_hx(v1, v2) simd_pack_8(simd_srli_16(v1, 4), v2)
782#endif
783
784#ifndef simd_pack_8_hl
785#define simd_pack_8_hl(v1, v2) simd_pack_8(simd_srli_16(v1, 4), v2)
786#endif
787
788#ifndef simd_pack_8_hh
789#define simd_pack_8_hh(v1, v2) simd_pack_8(simd_srli_16(v1, 4), simd_srli_16(v2, 4))
790#endif
791
792#ifndef simd_pack_16_xx
793#define simd_pack_16_xx(v1, v2) simd_pack_16(v1, v2)
794#endif
795
796#ifndef simd_pack_16_xl
797#define simd_pack_16_xl(v1, v2) simd_pack_16(v1, v2)
798#endif
799
800#ifndef simd_pack_16_xh
801#define simd_pack_16_xh(v1, v2) simd_pack_16(v1, simd_srli_16(v2, 8))
802#endif
803
804#ifndef simd_pack_16_lx
805#define simd_pack_16_lx(v1, v2) simd_pack_16(v1, v2)
806#endif
807
808#ifndef simd_pack_16_ll
809#define simd_pack_16_ll(v1, v2) simd_pack_16(v1, v2)
810#endif
811
812#ifndef simd_pack_16_lh
813#define simd_pack_16_lh(v1, v2) simd_pack_16(v1, simd_srli_16(v2, 8))
814#endif
815
816#ifndef simd_pack_16_hx
817#define simd_pack_16_hx(v1, v2) simd_pack_16(simd_srli_16(v1, 8), v2)
818#endif
819
820#ifndef simd_pack_16_hl
821#define simd_pack_16_hl(v1, v2) simd_pack_16(simd_srli_16(v1, 8), v2)
822#endif
823
824#ifndef simd_pack_16_hh
825//#define simd_pack_16_hh(v1, v2) simd_pack_16(simd_srli_16(v1, 8), simd_srli_16(v2, 8))
826//Masking performned by simd_pack_16 is unnecessary.
827#define simd_pack_16_hh(v1, v2) simd_packus_16(simd_srli_16(v1, 8), simd_srli_16(v2, 8))
828#endif
829
830
831static inline long bitblock_bit_count(SIMD_type v) {
832  union {SIMD_type vec; unsigned long elems[sizeof(SIMD_type)/sizeof(unsigned long)];} x;
833  x.vec = v;
834  long long b = 0;
835  for (int i = 0; i < sizeof(SIMD_type)/sizeof(unsigned long); i++) {
836    b += __builtin_popcountl(x.elems[i]);
837  }
838  return b;
839}
840
841#endif
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