source: trunk/lib/block_carry.h @ 1073

Last change on this file since 1073 was 1073, checked in by cameron, 8 years ago

carry_flip primitive

File size: 7.9 KB
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1/*  Block Addition, Subtraction and Shifts with Carry
2    Copyright (C) 2010, Robert D. Cameron
3    Licensed to the public under the Open Software License 3.0.
4    Licensed to International Characters Inc.
5       under the Academic Free License version 3.0.
6
7This file defines addition, subtract and shift operations on
8128-bit blocks.   Different versions of the operations are
9selectable with the CARRY_STRATEGY preprocessor constant.
10
11Each implementation defines the following "abstract data type"
12for block operations with carry.
13
14Typename:   CarryType
15Constant:   Carry0  represents a value of 0 for the carry bit.
16Predicate:  test_carry(x) returns nonzero if a carry bit is 1, 0 otherwise.
17Function:   carry_or(carry1, carry2) forms the logical or of two carries.
18Function:   adc128(x, y, carry, sum) computes (carry, sum) = x + y + carry,
19Function:   advance_with_carry(cursor, carry, rslt)
20                 computes (carry, rslt) = cursor + cursor + carry
21Function:   sbb128(x, y, borrow, diff)
22                 computes (borrow, diff) = y - x - borrow
23
24*/
25#ifndef BLOCK_CARRY_H
26#define BLOCK_CARRY_H
27
28
29typedef union {SIMD_type bitblock; uint64_t int64[2];} BitBlock_int64;
30
31
32
33/*------------------------------------------------------------*/
34#include "sse_simd.h"
35
36#define SIMD_CARRY_STRATEGY 1
37#define ADC64_STRATEGY 2
38#define ADC64_SAHF_STRATEGY 3
39
40#ifdef ADC64
41#ifdef SAHFLAHF
42#define CARRY_STRATEGY ADC64_SAHF_STRATEGY
43#else
44#define CARRY_STRATEGY ADC64_STRATEGY
45#endif
46#else
47#ifdef SAHFLAHF
48#define CARRY_STRATEGY ADC64_SAHF_STRATEGY
49#else
50#define CARRY_STRATEGY SIMD_CARRY_STRATEGY
51#endif
52#endif
53
54#if (CARRY_STRATEGY == ADC64_STRATEGY)
55typedef uint64_t CarryType;
56
57#define Carry0 0
58
59#define carry_flip(c) ((c) ^ 1)
60
61#define test_carry(x) ((x) > 0)
62
63#define carry_or(carry1, carry2) (carry1 | carry2)
64
65#define adc(x,y,carry,sum) \
66  __asm__ __volatile__ ("add %[carryflag], %[e]\n\t" \
67        "adc %[e], %[z]\n\t" \
68        "mov $0, %1\n\t" \
69        "adc %[carryflag], %1\n\t" \
70        : [z] "=r" (sum), [carryflag] "=a" (carry) \
71        : "[z]" (x), [e] "r" (y), "[carryflag]" (carry) \
72        : "cc")
73
74#define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \
75   __asm__ __volatile__ ("neg %[carryflag]\n\t" \
76         "adc %[e1], %[z1]\n\t" \
77         "adc %[e2], %[z2]\n\t" \
78         "mov $0, %[carryflag]\n\t" \
79         "adc $0, %[carryflag]\n\t" \
80     : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=r" (carry) \
81         : "[z1]" (x1), "[z2]" (x2), \
82           [e1] "r" (y1), [e2] "r" (y2), \
83           "[carryflag]" (carry) \
84         : "cc")
85
86
87#define adc128(first, second, carry, sum) \
88do {\
89  BitBlock_int64 rslt, x, y;\
90  x.bitblock = first;\
91  y.bitblock = second;\
92  double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\
93  sum = rslt.bitblock;\
94} while(0)
95
96
97
98#define double_int64_advance(x1, x2, rslt1, rslt2, carry) \
99  __asm__  (\
100        "add %[z1], %[z1]\n\t" \
101        "adc %[z2], %[z2]\n\t" \
102        "lea 0(%[carryflag], %[z1]), %[z1]\n\t" \
103        "setc %%al\n\t" \
104         : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
105         : "[z1]" (x1), "[z2]" (x2), \
106           "[carryflag]" (carry) \
107         : "cc")
108
109/*  Slow
110#define double_int64_advance(x1, x2, rslt1, rslt2, carry) \
111  __asm__  (\
112        "shld $1, %[z1], %[z2]\n\t" \
113        "lea 0(%[carryflag], %[z1], 2), %[z1]\n\t" \
114        "setc %%al\n\t" \
115         : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
116         : "[z1]" (x1), "[z2]" (x2), \
117           "[carryflag]" (carry) \
118         : "cc")
119*/
120
121#define advance_with_carry(cursor, carry, rslt)\
122do {\
123  BitBlock_int64 x, z;\
124  x.bitblock = cursor;\
125  double_int64_advance(x.int64[0], x.int64[1], z.int64[0], z.int64[1], carry);\
126  rslt = z.bitblock;\
127} while(0)
128
129#define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, brw) \
130  __asm__  ("neg %[borrowflag]\n\t" \
131        "sbb %[e1], %[z1]\n\t" \
132        "sbb %[e2], %[z2]\n\t" \
133         "mov $0, %[borrowflag]\n\t" \
134         "sbb $0, %[borrowflag]\n\t" \
135     : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [borrowflag] "=a" (brw) \
136         : "[z1]" (x1), "[z2]" (x2), \
137           [e1] "r" (y1), [e2] "r" (y2), \
138           "[borrowflag]" (brw) \
139         : "cc")
140
141#define sbb128(first, second, borrow, diff) \
142do {\
143  BitBlock_int64 rslt, x, y;\
144  x.bitblock = first;\
145  y.bitblock = second;\
146  double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \
147                   rslt.int64[0], rslt.int64[1], borrow);\
148  diff = rslt.bitblock;\
149} while(0)
150
151
152#endif
153
154#if (CARRY_STRATEGY == ADC64_SAHF_STRATEGY)
155typedef uint64_t CarryType;
156
157#define Carry0 0
158
159#define test_carry(x) (((x)&256) > 0)
160
161#define carry_flip(c) ((c)^256)
162
163#define carry_or(carry1, carry2) (carry1 | carry2)
164
165#define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \
166  __asm__  ("sahf\n\t" \
167        "adc %[e1], %[z1]\n\t" \
168        "adc %[e2], %[z2]\n\t" \
169        "lahf\n\t" \
170     : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
171         : "[z1]" (x1), "[z2]" (x2), \
172           [e1] "r" (y1), [e2] "r" (y2), \
173           "[carryflag]" (carry) \
174         : "cc")
175
176#define adc128(first, second, carry, sum) \
177do {\
178  BitBlock_int64 rslt, x, y;\
179  x.bitblock = first;\
180  y.bitblock = second;\
181  double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\
182  sum = rslt.bitblock;\
183}while(0)
184
185
186
187#define double_int64_advance(x1, x2, rslt1, rslt2, carry) \
188  __asm__  ("sahf\n\t" \
189        "adc %[z1], %[z1]\n\t" \
190        "adc %[z2], %[z2]\n\t" \
191        "lahf\n\t" \
192     : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
193         : "[z1]" (x1), "[z2]" (x2), \
194           "[carryflag]" (carry) \
195         : "cc")
196
197
198#define advance_with_carry(cursor, carry, rslt)\
199do {\
200  BitBlock_int64 x, z;\
201  x.bitblock = cursor;\
202  double_int64_advance(x.int64[0], x.int64[1], z.int64[0], z.int64[1], carry);\
203  rslt = z.bitblock;\
204} while(0)
205
206
207
208
209#define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \
210  __asm__  ("sahf\n\t" \
211        "sbb %[e1], %[z1]\n\t" \
212        "sbb %[e2], %[z2]\n\t" \
213        "lahf\n\t" \
214     : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \
215         : "[z1]" (x1), "[z2]" (x2), \
216           [e1] "r" (y1), [e2] "r" (y2), \
217           "[carryflag]" (carry) \
218         : "cc")
219
220#define sbb128(first, second, borrow, diff) \
221do {\
222  BitBlock_int64 rslt, x, y;\
223  x.bitblock = first;\
224  y.bitblock = second;\
225  double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \
226                   rslt.int64[0], rslt.int64[1], borrow);\
227  diff = rslt.bitblock;\
228}while(0)
229
230#endif
231
232
233
234#if (CARRY_STRATEGY == SIMD_CARRY_STRATEGY)
235
236typedef SIMD_type CarryType;
237
238#define Carry0 simd_const_1(0)
239
240#define carry_flip(c) simd_xor(c, sisd_from_int(1))
241
242#define test_carry(x) bitblock_has_bit(x)
243
244#define carry_or(carry1, carry2) simd_or(carry1, carry2)
245
246#define adc128(x, y, carry,  sum) \
247do{ \
248  SIMD_type gen = simd_and(x, y); \
249  SIMD_type prop = simd_or(x, y); \
250  SIMD_type partial = simd_add_64(simd_add_64(x, y), carry); \
251  SIMD_type c1 = sisd_slli(simd_srli_64(simd_or(gen, simd_andc(prop, partial)), 63), 64); \
252  sum = simd_add_64(c1, partial); \
253  carry = sisd_srli(simd_or(gen, simd_andc(prop, sum)), 127); \
254} while(0)
255
256
257#define sbb128(x, y, borrow, difference) \
258do {\
259  SIMD_type gen = simd_andc(y, x); \
260  SIMD_type prop = simd_not(simd_xor(x, y)); \
261  SIMD_type partial = simd_sub_64(simd_sub_64(x, y), borrow); \
262  SIMD_type b1 = sisd_slli(simd_srli_64(simd_or(gen, simd_and(prop, partial)), 63), 64); \
263  difference = simd_sub_64(partial, b1); \
264  borrow = sisd_srli(simd_or(gen, simd_and(prop, difference)), 127); \
265}while(0)
266
267
268#define advance_with_carry(cursor, carry, rslt)\
269do {\
270  SIMD_type shift_out = simd_srli_64(cursor, 63);\
271  SIMD_type low_bits = simd_mergel_64(shift_out, carry);\
272  carry = sisd_srli(shift_out, 64);\
273  rslt = simd_or(simd_add_64(cursor, cursor), low_bits);\
274} while(0)
275
276#endif
277#endif
278
279
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