1 | /* Block Addition, Subtraction and Shifts with Carry |
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2 | Copyright (C) 2010, Robert D. Cameron |
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3 | Licensed to the public under the Open Software License 3.0. |
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4 | Licensed to International Characters Inc. |
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5 | under the Academic Free License version 3.0. |
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6 | |
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7 | This file defines addition, subtract and shift operations on |
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8 | 128-bit blocks. Different versions of the operations are |
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9 | selectable with the CARRY_STRATEGY preprocessor constant. |
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10 | |
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11 | Each implementation defines the following "abstract data type" |
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12 | for block operations with carry. |
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13 | |
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14 | Typename: CarryType |
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15 | Constant: Carry0 represents a value of 0 for the carry bit. |
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16 | Predicate: test_carry(x) returns nonzero if a carry bit is 1, 0 otherwise. |
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17 | Function: carry_or(carry1, carry2) forms the logical or of two carries. |
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18 | Function: adc128(x, y, carry, sum) computes (carry, sum) = x + y + carry, |
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19 | Function: advance_with_carry(cursor, carry, rslt) |
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20 | computes (carry, rslt) = cursor + cursor + carry |
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21 | Function: sbb128(x, y, borrow, diff) |
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22 | computes (borrow, diff) = y - x - borrow |
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23 | |
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24 | */ |
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25 | #ifndef BLOCK_CARRY_H |
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26 | #define BLOCK_CARRY_H |
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27 | |
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28 | |
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29 | |
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30 | |
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31 | |
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32 | /*------------------------------------------------------------*/ |
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33 | #include "sse_simd.h" |
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34 | |
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35 | #define SIMD_CARRY_STRATEGY 1 |
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36 | #define ADC64_STRATEGY 2 |
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37 | #define ADC64_SAHF_STRATEGY 3 |
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38 | |
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39 | #ifdef ADC64 |
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40 | #ifdef SAHFLAHF |
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41 | #define CARRY_STRATEGY ADC64_SAHF_STRATEGY |
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42 | #else |
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43 | #define CARRY_STRATEGY ADC64_STRATEGY |
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44 | #endif |
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45 | #else |
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46 | #define CARRY_STRATEGY SIMD_CARRY_STRATEGY |
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47 | #endif |
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48 | |
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49 | #if (CARRY_STRATEGY == ADC64_STRATEGY) |
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50 | typedef uint64_t CarryType; |
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51 | |
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52 | #define Carry0 0 |
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53 | |
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54 | #define test_carry(x) ((x) > 0) |
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55 | |
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56 | #define carry_or(carry1, carry2) (carry1 | carry2) |
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57 | |
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58 | #define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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59 | __asm__ __volatile__ ("add %[carryin], %[z1]\n\t" \ |
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60 | "adc %[e1], %[z1]\n\t" \ |
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61 | "adc %[e2], %[z2]\n\t" \ |
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62 | "mov $0, %[carryout]\n\t" \ |
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63 | "adc $0, %[carryout]\n\t" \ |
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64 | : [z1] "=a" (rslt1), [z2] "=r" (rslt2), [carryout] "=r" (carry) \ |
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65 | : "0" (y1), "1" (y2), [carryin] "2" (carry), \ |
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66 | [e1] "b" (x1), [e2] "r" (x2)\ |
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67 | : "cc") |
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68 | |
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69 | #define adc128(first, second, carry, sum) \ |
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70 | do\ |
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71 | {\ |
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72 | union {__m128i bitblock;\ |
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73 | uint64_t int64[2];} rslt;\ |
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74 | \ |
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75 | union {__m128i bitblock;\ |
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76 | uint64_t int64[2];} x;\ |
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77 | \ |
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78 | union {__m128i bitblock;\ |
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79 | uint64_t int64[2];} y;\ |
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80 | \ |
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81 | x.bitblock = first;\ |
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82 | y.bitblock = second;\ |
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83 | \ |
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84 | double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\ |
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85 | sum = rslt.bitblock;\ |
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86 | }while(0) |
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87 | |
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88 | |
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89 | |
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90 | #define advance_with_carry(cursor, carry, rslt)\ |
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91 | adc128(cursor, cursor, carry, rslt) |
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92 | |
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93 | |
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94 | #define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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95 | __asm__ ("sahf\n\t" \ |
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96 | "sbb %[e1], %[z1]\n\t" \ |
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97 | "sbb %[e2], %[z2]\n\t" \ |
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98 | "lahf\n\t" \ |
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99 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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100 | : "[z1]" (x1), "[z2]" (x2), \ |
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101 | [e1] "r" (y1), [e2] "r" (y2), \ |
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102 | "[carryflag]" (carry) \ |
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103 | : "cc") |
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104 | |
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105 | #define sbb128(first, second, borrow, diff) \ |
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106 | do\ |
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107 | { union {__m128i bitblock;\ |
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108 | uint64_t int64[2];} rslt;\ |
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109 | \ |
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110 | union {__m128i bitblock;\ |
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111 | uint64_t int64[2];} x;\ |
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112 | \ |
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113 | union {__m128i bitblock;\ |
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114 | uint64_t int64[2];} y;\ |
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115 | \ |
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116 | x.bitblock = first;\ |
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117 | y.bitblock = second;\ |
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118 | \ |
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119 | double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \ |
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120 | rslt.int64[0], rslt.int64[1], borrow);\ |
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121 | diff = rslt.bitblock;\ |
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122 | }while(0) |
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123 | |
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124 | #endif |
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125 | |
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126 | #if (CARRY_STRATEGY == ADC64_SAHF_STRATEGY) |
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127 | typedef uint64_t CarryType; |
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128 | |
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129 | #define Carry0 0 |
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130 | |
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131 | #define test_carry(x) (((x)&256) > 0) |
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132 | |
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133 | #define carry_or(carry1, carry2) (carry1 | carry2) |
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134 | |
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135 | #define double_int64_adc(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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136 | __asm__ ("sahf\n\t" \ |
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137 | "adc %[e1], %[z1]\n\t" \ |
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138 | "adc %[e2], %[z2]\n\t" \ |
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139 | "lahf\n\t" \ |
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140 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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141 | : "[z1]" (x1), "[z2]" (x2), \ |
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142 | [e1] "r" (y1), [e2] "r" (y2), \ |
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143 | "[carryflag]" (carry) \ |
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144 | : "cc") |
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145 | |
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146 | #define adc128(first, second, carry, sum) \ |
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147 | do\ |
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148 | {\ |
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149 | union {__m128i bitblock;\ |
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150 | uint64_t int64[2];} rslt;\ |
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151 | \ |
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152 | union {__m128i bitblock;\ |
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153 | uint64_t int64[2];} x;\ |
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154 | \ |
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155 | union {__m128i bitblock;\ |
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156 | uint64_t int64[2];} y;\ |
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157 | \ |
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158 | x.bitblock = first;\ |
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159 | y.bitblock = second;\ |
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160 | \ |
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161 | double_int64_adc(x.int64[0], x.int64[1], y.int64[0], y.int64[1], rslt.int64[0], rslt.int64[1], carry);\ |
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162 | sum = rslt.bitblock;\ |
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163 | }while(0) |
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164 | |
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165 | |
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166 | |
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167 | #define double_int64_advance(x1, x2, rslt1, rslt2, carry) \ |
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168 | __asm__ ("sahf\n\t" \ |
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169 | "adc %[z1], %[z1]\n\t" \ |
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170 | "adc %[z2], %[z2]\n\t" \ |
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171 | "lahf\n\t" \ |
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172 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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173 | : "[z1]" (x1), "[z2]" (x2), \ |
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174 | "[carryflag]" (carry) \ |
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175 | : "cc") |
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176 | |
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177 | |
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178 | #define advance_with_carry(cursor, carry, rslt)\ |
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179 | do\ |
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180 | {\ |
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181 | union {__m128i bitblock;\ |
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182 | uint64_t int64[2];} z;\ |
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183 | \ |
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184 | union {__m128i bitblock;\ |
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185 | uint64_t int64[2];} x;\ |
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186 | \ |
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187 | x.bitblock = cursor;\ |
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188 | \ |
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189 | double_int64_advance(x.int64[0], x.int64[1], z.int64[0], z.int64[1], carry);\ |
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190 | rslt = z.bitblock;\ |
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191 | }while(0) |
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192 | |
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193 | |
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194 | |
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195 | |
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196 | #define double_int64_sbb(x1, x2, y1, y2, rslt1, rslt2, carry) \ |
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197 | __asm__ ("sahf\n\t" \ |
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198 | "sbb %[e1], %[z1]\n\t" \ |
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199 | "sbb %[e2], %[z2]\n\t" \ |
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200 | "lahf\n\t" \ |
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201 | : [z1] "=r" (rslt1), [z2] "=r" (rslt2), [carryflag] "=a" (carry) \ |
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202 | : "[z1]" (x1), "[z2]" (x2), \ |
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203 | [e1] "r" (y1), [e2] "r" (y2), \ |
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204 | "[carryflag]" (carry) \ |
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205 | : "cc") |
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206 | |
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207 | #define sbb128(first, second, borrow, diff) \ |
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208 | do\ |
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209 | { union {__m128i bitblock;\ |
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210 | uint64_t int64[2];} rslt;\ |
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211 | \ |
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212 | union {__m128i bitblock;\ |
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213 | uint64_t int64[2];} x;\ |
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214 | \ |
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215 | union {__m128i bitblock;\ |
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216 | uint64_t int64[2];} y;\ |
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217 | \ |
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218 | x.bitblock = first;\ |
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219 | y.bitblock = second;\ |
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220 | \ |
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221 | double_int64_sbb(x.int64[0], x.int64[1], y.int64[0], y.int64[1], \ |
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222 | rslt.int64[0], rslt.int64[1], borrow);\ |
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223 | diff = rslt.bitblock;\ |
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224 | }while(0) |
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225 | |
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226 | #endif |
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227 | |
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228 | |
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229 | |
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230 | #if (CARRY_STRATEGY == SIMD_CARRY_STRATEGY) |
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231 | |
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232 | typedef SIMD_type CarryType; |
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233 | |
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234 | #define Carry0 simd_const_1(0) |
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235 | |
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236 | #define test_carry(x) bitblock_has_bit(x) |
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237 | |
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238 | #define carry_or(carry1, carry2) simd_or(carry1, carry2) |
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239 | |
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240 | #define adc128(x, y, carry, sum) \ |
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241 | do{ \ |
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242 | SIMD_type gen = simd_and(x, y); \ |
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243 | SIMD_type prop = simd_or(x, y); \ |
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244 | SIMD_type partial = simd_add_64(simd_add_64(x, y), carry); \ |
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245 | SIMD_type c1 = sisd_slli(simd_srli_64(simd_or(gen, simd_andc(prop, partial)), 63), 64); \ |
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246 | sum = simd_add_64(c1, partial); \ |
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247 | carry = sisd_srli(simd_or(gen, simd_andc(prop, sum)), 127); \ |
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248 | } while(0) |
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249 | |
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250 | |
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251 | #define sbb128(x, y, borrow, difference) \ |
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252 | do {\ |
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253 | SIMD_type gen = simd_andc(y, x); \ |
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254 | SIMD_type prop = simd_not(simd_xor(x, y)); \ |
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255 | SIMD_type partial = simd_sub_64(simd_sub_64(x, y), borrow); \ |
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256 | SIMD_type b1 = sisd_slli(simd_srli_64(simd_or(gen, simd_and(prop, partial)), 63), 64); \ |
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257 | difference = simd_sub_64(partial, b1); \ |
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258 | borrow = sisd_srli(simd_or(gen, simd_and(prop, difference)), 127); \ |
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259 | }while(0) |
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260 | |
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261 | |
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262 | #define advance_with_carry(cursor, carry, rslt)\ |
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263 | do{\ |
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264 | SIMD_type shift_out = simd_srli_64(cursor, 63);\ |
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265 | SIMD_type low_bits = simd_mergel_64(shift_out, carry);\ |
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266 | carry = sisd_srli(shift_out, 64);\ |
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267 | rslt = simd_or(simd_add_64(cursor, cursor), low_bits);\ |
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268 | }while(0) |
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269 | |
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270 | #endif |
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271 | #endif |
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272 | |
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273 | |
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