Changeset 1348 for docs/HPCA2012/00-abstract.tex

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Aug 23, 2011, 1:02:30 AM (8 years ago)
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new abstract for new intro

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 r1302 XML is a set of rules for the encoding of documents in machine-readable form. The simplicity and generality of the rules make it widely used in web services and database systems.  Traditional XML parsers are built around a byte-at-a-time processing model where each character token of an XML document is examined in sequence.  Unfortunately, the byte-at-a-time sequential model is a performance barrier in more demanding applications, is energy-inefficient, and makes poor use of the wide SIMD registers and other parallelism features of modern processors. In modern applications text files are employed widely. For example, XML files provide data storage in human readable format and are widely used in web services, database systems, and mobile phone SDKs. Traditional text processing tools are built around a byte-at-a-time processing model where each character token of a document is examined. The byte-at-a-time model is highly challenging for commodity processors. It includes many unpredictable input-dependent branches which cause pipeline squashes and stalls. Furthermore, typical text processing tools perform few operations per processed character and experience high cache miss rate when parsing the file. Overall, parsing text in important domains like XML processing require high performance and hardware designers have adopted customized hardware and ASIC solutions. This paper assesses the energy and performance of a new approach to XML parsing, based on parallel bit stream technology, and as implemented on successive software generations of the Parabix XML parser. In Parabix, we first convert character streams into sets of parallel bit streams. We then exploit the SIMD operations prevalent on commodity-level hardware for performance. The first generation Parabix1 parser exploits the processor built-in $bitscan$ instructions over these streams to make multibyte moves but follows an otherwise sequential approach.  The second generation Parabix2 technology adds further parallelism by replacing much of the sequential bit scanning with a parallel scanning approach based on bit stream addition.  We evaluate Parabix1 and Parabix2 against two widely used XML parsers, James Clark's Expat and Apache's Xerces, and across three generations of x86 machines, including the new Intel \SB{}.  We show that Parabix2's speedup is 2$\times$--7$\times$ over Expat and Xerces.  In stark contrast to the energy expenditures necessary to realize performance gains through multicore parallelism, we also show that our Parabix parsers deliver energy savings in direct proportion to the gains in performance.  In addition, we assess the scalability advantages of SIMD processor improvements across Intel processor generations, culminating with an evaluation of the 256-bit AVX technology in \SB{} versus the now legacy 128-bit SSE technology. % In this paper on commodity. % We expose through a toolchain. % We demonstrate what can be achieved with branches etc. % We study various tradeoffs. % Finally we show the benefits can be stacked In this paper we enable text processing applications to effectively use commodity processors. We introduce Parabix (Parallel Bitstream) technology, a software runtime and execution model that applications to exploit modern SIMD instructions extensions for high performance text processing. Parabix enables the application developer to write constructs assuming unlimited SIMD data parallelism. Our runtime translator generates code based on machine specifics (e.g., SIMD register widths) to realize the programmer specifications.  The key insight into efficient text processing in Parabix is the data organization. It transposes the sequence of 8-byte characters into sets of 8 parallel bit streams which then enables us to operate on multiple characters with a single bit-parallel SIMD operators. We demonstrate the features and efficiency of parabix with a XML parsing application. We evaluate Parabix-based XML parser against two widely used XML parsers, Expat and Apache's Xerces, and across three generations of x86 processors, including the new Intel \SB{}.  We show that Parabix's speedup is 2$\times$--7$\times$ over Expat and Xerces. We observe that Parabix overall makes efficient use of intra-core parallel hardware on commodity processors and supports significant gains in energy. Using Parabix, we assess the scalability advantages of SIMD processor improvements across Intel processor generations, culminating with a look at the latex 256-bit AVX technology in \SB{} versus the now legacy 128-bit SSE technology. As part of this study we also preview the Neon extensions on ARM processors. Finally, we partition the XML program into pipeline stages and demonstrate that thread-level parallelism exploits SIMD units scattered across the different cores and improves performance (2$\times$ on 4 cores) at same energy levels as the single-thread version.