Changeset 1390 for docs/HPCA2012


Ignore:
Timestamp:
Aug 26, 2011, 3:31:55 PM (8 years ago)
Author:
lindanl
Message:

fix spelling mistakes

Location:
docs/HPCA2012
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • docs/HPCA2012/05-corei3.tex

    r1381 r1390  
    88
    99%some of the numbers are roughly calculated, needs to be recalculated for final version
    10 \subsection{Cache behaviour}
     10\subsection{Cache behavior}
    1111The approximate miss penalty in \CITHREE\ for L1, L2 and L3 caches is
    12124, 11, and 36 cycles respectively.  The L1 (32KB) and L2 cache (256KB)
  • docs/HPCA2012/09-pipeline.tex

    r1380 r1390  
    9393performance of custom hardware solutions. Parabix demonstrates the
    9494potential to enable an entire new class of applications, text
    95 processing, to exploit multicores 
     95processing, to exploit multicores.
    9696
    9797
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