Ignore:
Timestamp:
Aug 26, 2011, 3:31:55 PM (8 years ago)
Author:
lindanl
Message:

fix spelling mistakes

File:
1 edited

Legend:

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  • docs/HPCA2012/05-corei3.tex

    r1381 r1390  
    88
    99%some of the numbers are roughly calculated, needs to be recalculated for final version
    10 \subsection{Cache behaviour}
     10\subsection{Cache behavior}
    1111The approximate miss penalty in \CITHREE\ for L1, L2 and L3 caches is
    12124, 11, and 36 cycles respectively.  The L1 (32KB) and L2 cache (256KB)
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